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Searched refs:HAVE_RST_BAR (Results 1 – 23 of 23) sorted by relevance

/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mt8183-apmixedsys.c112 HAVE_RST_BAR | PLL_AO, BIT(24), 22, 8, 0x0204, 24, 0x0, 0x0, 0,
115 HAVE_RST_BAR | PLL_AO, BIT(24), 22, 8, 0x0214, 24, 0x0, 0x0, 0,
118 HAVE_RST_BAR | PLL_AO, BIT(24), 22, 8, 0x0294, 24, 0x0, 0x0, 0,
121 HAVE_RST_BAR, BIT(24), 22, 8, 0x0224, 24, 0x0, 0x0, 0,
124 HAVE_RST_BAR, BIT(24), 22, 8, 0x0234, 24, 0x0, 0x0, 0,
134 HAVE_RST_BAR, BIT(23), 22, 8, 0x0274, 24, 0x0, 0x0, 0,
H A Dclk-mt8135-apmixedsys.c40 …PLL(CLK_APMIXED_MAINPLL, "mainpll", 0x21c, 0x234, 0xf0000000, HAVE_RST_BAR, 21, 0x21c, 6, 0x0, 0x2…
41 …PLL(CLK_APMIXED_UNIVPLL, "univpll", 0x238, 0x250, 0xf3000000, HAVE_RST_BAR, 7, 0x238, 6, 0x0, 0x23…
42 …PLL(CLK_APMIXED_MMPLL, "mmpll", 0x254, 0x26c, 0xf0000000, HAVE_RST_BAR, 21, 0x254, 6, 0x0, 0x258, …
H A Dclk-mt8192-apmixedsys.c74 HAVE_RST_BAR, BIT(23), 22, 0x0344, 24, 0, 0, 0, 0x0344, 0),
76 HAVE_RST_BAR, BIT(23), 22, 0x030c, 24, 0, 0, 0, 0x030c, 0),
82 HAVE_RST_BAR, BIT(23), 22, 0x0364, 24, 0, 0, 0, 0x0364, 0),
84 HAVE_RST_BAR, BIT(23), 22, 0x0374, 24, 0, 0, 0, 0x0374, 0),
H A Dclk-mt8188-apmixedsys.c70 HAVE_RST_BAR, BIT(23), 22, 0x0548, 24, 0, 0, 0, 0x0548, 0, 0, 0, 9),
72 HAVE_RST_BAR, BIT(23), 22, 0x0460, 24, 0, 0, 0, 0x0460, 0, 0, 0, 9),
76 HAVE_RST_BAR, BIT(23), 22, 0x0508, 24, 0, 0, 0, 0x0508, 0, 0, 0, 9),
H A Dclk-mt2712-apmixedsys.c81 HAVE_RST_BAR, 31, 0x0230, 4, 0, 0, 0, 0x0234, 0),
83 HAVE_RST_BAR, 31, 0x0240, 4, 0, 0, 0, 0x0244, 0),
105 HAVE_RST_BAR, 31, 0x0100, 4, 0, 0, 0, 0x0104, 0, armca35pll_div_table),
H A Dclk-mt8195-apmixedsys.c75 HAVE_RST_BAR, BIT(23), 22, 0x00e8, 24, 0, 0, 0, 0x00e8, 0, 0x00e8, 0, 9),
77 HAVE_RST_BAR, BIT(23), 22, 0x01d8, 24, 0, 0, 0, 0x01d8, 0, 0x01d8, 0, 9),
83 HAVE_RST_BAR, BIT(23), 22, 0x01f8, 24, 0, 0, 0, 0x01f8, 0, 0x01f8, 0, 9),
H A Dclk-mt8516-apmixedsys.c63 HAVE_RST_BAR, 21, 0x0124, 24, 0, 0x0124, 0),
65 HAVE_RST_BAR, 7, 0x0144, 24, 0, 0x0144, 0),
H A Dclk-mt8167-apmixedsys.c62 HAVE_RST_BAR, 21, 0x0124, 24, 0, 0x0124, 0),
64 HAVE_RST_BAR, 7, 0x0144, 24, 0, 0x0144, 0),
H A Dclk-mt7622-apmixedsys.c62 HAVE_RST_BAR, 21, 0x0214, 24, 0, 0x0214, 0),
64 HAVE_RST_BAR, 7, 0x0224, 24, 0, 0x0224, 14),
H A Dclk-mt8365-apmixedsys.c86 HAVE_RST_BAR, 22, 0x022C, 24, 0, 0, 0, 0x022C, 0, CON0_MT8365_RST_BAR, 0),
88 HAVE_RST_BAR, 22, 0x020C, 24, 0, 0, 0, 0x020C, 0, CON0_MT8365_RST_BAR, 0),
H A Dclk-mt8186-apmixedsys.c58 HAVE_RST_BAR, BIT(23), 22, 0x0248, 24, 0, 0, 0, 0x0248),
60 HAVE_RST_BAR, BIT(23), 22, 0x0328, 24, 0, 0, 0, 0x0328),
H A Dclk-mt8173-apmixedsys.c65 PLL(CLK_APMIXED_MAINPLL, "mainpll", 0x220, 0x22c, 0xf0000100, HAVE_RST_BAR, 21,
67 PLL(CLK_APMIXED_UNIVPLL, "univpll", 0x230, 0x23c, 0xfe000000, HAVE_RST_BAR, 7,
H A Dclk-mt6795-apmixedsys.c49 PLL(CLK_APMIXED_MAINPLL, "mainpll", 0x220, 0x22c, 0xf0000101, HAVE_RST_BAR,
51 PLL(CLK_APMIXED_UNIVPLL, "univpll", 0x230, 0x23c, 0xfe000101, HAVE_RST_BAR,
H A Dclk-mt6779.c1191 (HAVE_RST_BAR), BIT(24), 22, 8, 0x0234, 24, 0, 0, 0,
1194 (HAVE_RST_BAR), BIT(24), 22, 8, 0x0244, 24,
1203 (HAVE_RST_BAR), BIT(23), 22, 8, 0x02b4, 24,
1206 (HAVE_RST_BAR), BIT(23), 22, 8, 0x0284, 24,
H A Dclk-pll.h22 #define HAVE_RST_BAR BIT(0) macro
H A Dclk-mt7629.c316 HAVE_RST_BAR, 21, 0x0214, 24, 0, 0x0214, 0),
318 HAVE_RST_BAR, 7, 0x0224, 24, 0, 0x0224, 14),
H A Dclk-pll.c239 if (pll->data->flags & HAVE_RST_BAR) { in mtk_pll_prepare()
253 if (pll->data->flags & HAVE_RST_BAR) { in mtk_pll_unprepare()
H A Dclk-mt6765.c712 (HAVE_RST_BAR | PLL_AO), 22, 8, 0x0240, 24, 0, 0, 0, 0x0240,
719 HAVE_RST_BAR, 22, 8, 0x0270, 24, 0, 0, 0, 0x0270, 0),
H A Dclk-mt2701.c943 HAVE_RST_BAR, 21, 0x210, 4, 0x0, 0x214, 0),
945 HAVE_RST_BAR, 7, 0x220, 4, 0x0, 0x224, 14),
/openbmc/u-boot/drivers/clk/mediatek/
H A Dclk-mtk.h13 #define HAVE_RST_BAR BIT(0) macro
H A Dclk-mtk.c222 if (pll->flags & HAVE_RST_BAR) { in mtk_apmixedsys_enable()
237 if (pll->flags & HAVE_RST_BAR) { in mtk_apmixedsys_disable()
H A Dclk-mt7629.c50 PLL(CLK_APMIXED_MAINPLL, 0x210, 0x21c, 0x1, HAVE_RST_BAR,
52 PLL(CLK_APMIXED_UNIV2PLL, 0x220, 0x22c, 0x1, HAVE_RST_BAR,
H A Dclk-mt7623.c46 PLL(CLK_APMIXED_MAINPLL, 0x210, 0x21c, 0xf0000001, HAVE_RST_BAR,
48 PLL(CLK_APMIXED_UNIVPLL, 0x220, 0x22c, 0xf3000001, HAVE_RST_BAR,