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Searched refs:GT_DEF_PCI0_IO_BASE (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/arch/mips/cobalt/
H A Dpci.c37 .io_offset = 0 - GT_DEF_PCI0_IO_BASE,
38 .io_map_base = CKSEG1ADDR(GT_DEF_PCI0_IO_BASE),
H A Dsetup.c84 set_io_port_base(CKSEG1ADDR(GT_DEF_PCI0_IO_BASE)); in plat_mem_setup()
/openbmc/linux/arch/mips/include/asm/
H A Dgt64120.h531 #define GT_DEF_PCI0_IO_BASE 0x10000000UL macro
/openbmc/u-boot/include/
H A Dgt64120.h529 #define GT_DEF_PCI0_IO_BASE 0x10000000 macro