1*83d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0 */ 2a79b5e68SGabor Juhos /* 3a79b5e68SGabor Juhos * Copyright (C) 2000, 2004, 2005 MIPS Technologies, Inc. 4a79b5e68SGabor Juhos * All rights reserved. 5a79b5e68SGabor Juhos * Authors: Carsten Langgaard <carstenl@mips.com> 6a79b5e68SGabor Juhos * Maciej W. Rozycki <macro@mips.com> 7a79b5e68SGabor Juhos * Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org) 8a79b5e68SGabor Juhos */ 9a79b5e68SGabor Juhos #ifndef _ASM_GT64120_H 10a79b5e68SGabor Juhos #define _ASM_GT64120_H 11a79b5e68SGabor Juhos 12a79b5e68SGabor Juhos #define MSK(n) ((1 << (n)) - 1) 13a79b5e68SGabor Juhos 14a79b5e68SGabor Juhos /* 15a79b5e68SGabor Juhos * Register offset addresses 16a79b5e68SGabor Juhos */ 17a79b5e68SGabor Juhos /* CPU Configuration. */ 18a79b5e68SGabor Juhos #define GT_CPU_OFS 0x000 19a79b5e68SGabor Juhos 20a79b5e68SGabor Juhos #define GT_MULTI_OFS 0x120 21a79b5e68SGabor Juhos 22a79b5e68SGabor Juhos /* CPU Address Decode. */ 23a79b5e68SGabor Juhos #define GT_SCS10LD_OFS 0x008 24a79b5e68SGabor Juhos #define GT_SCS10HD_OFS 0x010 25a79b5e68SGabor Juhos #define GT_SCS32LD_OFS 0x018 26a79b5e68SGabor Juhos #define GT_SCS32HD_OFS 0x020 27a79b5e68SGabor Juhos #define GT_CS20LD_OFS 0x028 28a79b5e68SGabor Juhos #define GT_CS20HD_OFS 0x030 29a79b5e68SGabor Juhos #define GT_CS3BOOTLD_OFS 0x038 30a79b5e68SGabor Juhos #define GT_CS3BOOTHD_OFS 0x040 31a79b5e68SGabor Juhos #define GT_PCI0IOLD_OFS 0x048 32a79b5e68SGabor Juhos #define GT_PCI0IOHD_OFS 0x050 33a79b5e68SGabor Juhos #define GT_PCI0M0LD_OFS 0x058 34a79b5e68SGabor Juhos #define GT_PCI0M0HD_OFS 0x060 35a79b5e68SGabor Juhos #define GT_ISD_OFS 0x068 36a79b5e68SGabor Juhos 37a79b5e68SGabor Juhos #define GT_PCI0M1LD_OFS 0x080 38a79b5e68SGabor Juhos #define GT_PCI0M1HD_OFS 0x088 39a79b5e68SGabor Juhos #define GT_PCI1IOLD_OFS 0x090 40a79b5e68SGabor Juhos #define GT_PCI1IOHD_OFS 0x098 41a79b5e68SGabor Juhos #define GT_PCI1M0LD_OFS 0x0a0 42a79b5e68SGabor Juhos #define GT_PCI1M0HD_OFS 0x0a8 43a79b5e68SGabor Juhos #define GT_PCI1M1LD_OFS 0x0b0 44a79b5e68SGabor Juhos #define GT_PCI1M1HD_OFS 0x0b8 45a79b5e68SGabor Juhos #define GT_PCI1M1LD_OFS 0x0b0 46a79b5e68SGabor Juhos #define GT_PCI1M1HD_OFS 0x0b8 47a79b5e68SGabor Juhos 48a79b5e68SGabor Juhos #define GT_SCS10AR_OFS 0x0d0 49a79b5e68SGabor Juhos #define GT_SCS32AR_OFS 0x0d8 50a79b5e68SGabor Juhos #define GT_CS20R_OFS 0x0e0 51a79b5e68SGabor Juhos #define GT_CS3BOOTR_OFS 0x0e8 52a79b5e68SGabor Juhos 53a79b5e68SGabor Juhos #define GT_PCI0IOREMAP_OFS 0x0f0 54a79b5e68SGabor Juhos #define GT_PCI0M0REMAP_OFS 0x0f8 55a79b5e68SGabor Juhos #define GT_PCI0M1REMAP_OFS 0x100 56a79b5e68SGabor Juhos #define GT_PCI1IOREMAP_OFS 0x108 57a79b5e68SGabor Juhos #define GT_PCI1M0REMAP_OFS 0x110 58a79b5e68SGabor Juhos #define GT_PCI1M1REMAP_OFS 0x118 59a79b5e68SGabor Juhos 60a79b5e68SGabor Juhos /* CPU Error Report. */ 61a79b5e68SGabor Juhos #define GT_CPUERR_ADDRLO_OFS 0x070 62a79b5e68SGabor Juhos #define GT_CPUERR_ADDRHI_OFS 0x078 63a79b5e68SGabor Juhos 64a79b5e68SGabor Juhos #define GT_CPUERR_DATALO_OFS 0x128 /* GT-64120A only */ 65a79b5e68SGabor Juhos #define GT_CPUERR_DATAHI_OFS 0x130 /* GT-64120A only */ 66a79b5e68SGabor Juhos #define GT_CPUERR_PARITY_OFS 0x138 /* GT-64120A only */ 67a79b5e68SGabor Juhos 68a79b5e68SGabor Juhos /* CPU Sync Barrier. */ 69a79b5e68SGabor Juhos #define GT_PCI0SYNC_OFS 0x0c0 70a79b5e68SGabor Juhos #define GT_PCI1SYNC_OFS 0x0c8 71a79b5e68SGabor Juhos 72a79b5e68SGabor Juhos /* SDRAM and Device Address Decode. */ 73a79b5e68SGabor Juhos #define GT_SCS0LD_OFS 0x400 74a79b5e68SGabor Juhos #define GT_SCS0HD_OFS 0x404 75a79b5e68SGabor Juhos #define GT_SCS1LD_OFS 0x408 76a79b5e68SGabor Juhos #define GT_SCS1HD_OFS 0x40c 77a79b5e68SGabor Juhos #define GT_SCS2LD_OFS 0x410 78a79b5e68SGabor Juhos #define GT_SCS2HD_OFS 0x414 79a79b5e68SGabor Juhos #define GT_SCS3LD_OFS 0x418 80a79b5e68SGabor Juhos #define GT_SCS3HD_OFS 0x41c 81a79b5e68SGabor Juhos #define GT_CS0LD_OFS 0x420 82a79b5e68SGabor Juhos #define GT_CS0HD_OFS 0x424 83a79b5e68SGabor Juhos #define GT_CS1LD_OFS 0x428 84a79b5e68SGabor Juhos #define GT_CS1HD_OFS 0x42c 85a79b5e68SGabor Juhos #define GT_CS2LD_OFS 0x430 86a79b5e68SGabor Juhos #define GT_CS2HD_OFS 0x434 87a79b5e68SGabor Juhos #define GT_CS3LD_OFS 0x438 88a79b5e68SGabor Juhos #define GT_CS3HD_OFS 0x43c 89a79b5e68SGabor Juhos #define GT_BOOTLD_OFS 0x440 90a79b5e68SGabor Juhos #define GT_BOOTHD_OFS 0x444 91a79b5e68SGabor Juhos 92a79b5e68SGabor Juhos #define GT_ADERR_OFS 0x470 93a79b5e68SGabor Juhos 94a79b5e68SGabor Juhos /* SDRAM Configuration. */ 95a79b5e68SGabor Juhos #define GT_SDRAM_CFG_OFS 0x448 96a79b5e68SGabor Juhos 97a79b5e68SGabor Juhos #define GT_SDRAM_OPMODE_OFS 0x474 98a79b5e68SGabor Juhos #define GT_SDRAM_BM_OFS 0x478 99a79b5e68SGabor Juhos #define GT_SDRAM_ADDRDECODE_OFS 0x47c 100a79b5e68SGabor Juhos 101a79b5e68SGabor Juhos /* SDRAM Parameters. */ 102a79b5e68SGabor Juhos #define GT_SDRAM_B0_OFS 0x44c 103a79b5e68SGabor Juhos #define GT_SDRAM_B1_OFS 0x450 104a79b5e68SGabor Juhos #define GT_SDRAM_B2_OFS 0x454 105a79b5e68SGabor Juhos #define GT_SDRAM_B3_OFS 0x458 106a79b5e68SGabor Juhos 107a79b5e68SGabor Juhos /* Device Parameters. */ 108a79b5e68SGabor Juhos #define GT_DEV_B0_OFS 0x45c 109a79b5e68SGabor Juhos #define GT_DEV_B1_OFS 0x460 110a79b5e68SGabor Juhos #define GT_DEV_B2_OFS 0x464 111a79b5e68SGabor Juhos #define GT_DEV_B3_OFS 0x468 112a79b5e68SGabor Juhos #define GT_DEV_BOOT_OFS 0x46c 113a79b5e68SGabor Juhos 114a79b5e68SGabor Juhos /* ECC. */ 115a79b5e68SGabor Juhos #define GT_ECC_ERRDATALO 0x480 /* GT-64120A only */ 116a79b5e68SGabor Juhos #define GT_ECC_ERRDATAHI 0x484 /* GT-64120A only */ 117a79b5e68SGabor Juhos #define GT_ECC_MEM 0x488 /* GT-64120A only */ 118a79b5e68SGabor Juhos #define GT_ECC_CALC 0x48c /* GT-64120A only */ 119a79b5e68SGabor Juhos #define GT_ECC_ERRADDR 0x490 /* GT-64120A only */ 120a79b5e68SGabor Juhos 121a79b5e68SGabor Juhos /* DMA Record. */ 122a79b5e68SGabor Juhos #define GT_DMA0_CNT_OFS 0x800 123a79b5e68SGabor Juhos #define GT_DMA1_CNT_OFS 0x804 124a79b5e68SGabor Juhos #define GT_DMA2_CNT_OFS 0x808 125a79b5e68SGabor Juhos #define GT_DMA3_CNT_OFS 0x80c 126a79b5e68SGabor Juhos #define GT_DMA0_SA_OFS 0x810 127a79b5e68SGabor Juhos #define GT_DMA1_SA_OFS 0x814 128a79b5e68SGabor Juhos #define GT_DMA2_SA_OFS 0x818 129a79b5e68SGabor Juhos #define GT_DMA3_SA_OFS 0x81c 130a79b5e68SGabor Juhos #define GT_DMA0_DA_OFS 0x820 131a79b5e68SGabor Juhos #define GT_DMA1_DA_OFS 0x824 132a79b5e68SGabor Juhos #define GT_DMA2_DA_OFS 0x828 133a79b5e68SGabor Juhos #define GT_DMA3_DA_OFS 0x82c 134a79b5e68SGabor Juhos #define GT_DMA0_NEXT_OFS 0x830 135a79b5e68SGabor Juhos #define GT_DMA1_NEXT_OFS 0x834 136a79b5e68SGabor Juhos #define GT_DMA2_NEXT_OFS 0x838 137a79b5e68SGabor Juhos #define GT_DMA3_NEXT_OFS 0x83c 138a79b5e68SGabor Juhos 139a79b5e68SGabor Juhos #define GT_DMA0_CUR_OFS 0x870 140a79b5e68SGabor Juhos #define GT_DMA1_CUR_OFS 0x874 141a79b5e68SGabor Juhos #define GT_DMA2_CUR_OFS 0x878 142a79b5e68SGabor Juhos #define GT_DMA3_CUR_OFS 0x87c 143a79b5e68SGabor Juhos 144a79b5e68SGabor Juhos /* DMA Channel Control. */ 145a79b5e68SGabor Juhos #define GT_DMA0_CTRL_OFS 0x840 146a79b5e68SGabor Juhos #define GT_DMA1_CTRL_OFS 0x844 147a79b5e68SGabor Juhos #define GT_DMA2_CTRL_OFS 0x848 148a79b5e68SGabor Juhos #define GT_DMA3_CTRL_OFS 0x84c 149a79b5e68SGabor Juhos 150a79b5e68SGabor Juhos /* DMA Arbiter. */ 151a79b5e68SGabor Juhos #define GT_DMA_ARB_OFS 0x860 152a79b5e68SGabor Juhos 153a79b5e68SGabor Juhos /* Timer/Counter. */ 154a79b5e68SGabor Juhos #define GT_TC0_OFS 0x850 155a79b5e68SGabor Juhos #define GT_TC1_OFS 0x854 156a79b5e68SGabor Juhos #define GT_TC2_OFS 0x858 157a79b5e68SGabor Juhos #define GT_TC3_OFS 0x85c 158a79b5e68SGabor Juhos 159a79b5e68SGabor Juhos #define GT_TC_CONTROL_OFS 0x864 160a79b5e68SGabor Juhos 161a79b5e68SGabor Juhos /* PCI Internal. */ 162a79b5e68SGabor Juhos #define GT_PCI0_CMD_OFS 0xc00 163a79b5e68SGabor Juhos #define GT_PCI0_TOR_OFS 0xc04 164a79b5e68SGabor Juhos #define GT_PCI0_BS_SCS10_OFS 0xc08 165a79b5e68SGabor Juhos #define GT_PCI0_BS_SCS32_OFS 0xc0c 166a79b5e68SGabor Juhos #define GT_PCI0_BS_CS20_OFS 0xc10 167a79b5e68SGabor Juhos #define GT_PCI0_BS_CS3BT_OFS 0xc14 168a79b5e68SGabor Juhos 169a79b5e68SGabor Juhos #define GT_PCI1_IACK_OFS 0xc30 170a79b5e68SGabor Juhos #define GT_PCI0_IACK_OFS 0xc34 171a79b5e68SGabor Juhos 172a79b5e68SGabor Juhos #define GT_PCI0_BARE_OFS 0xc3c 173a79b5e68SGabor Juhos #define GT_PCI0_PREFMBR_OFS 0xc40 174a79b5e68SGabor Juhos 175a79b5e68SGabor Juhos #define GT_PCI0_SCS10_BAR_OFS 0xc48 176a79b5e68SGabor Juhos #define GT_PCI0_SCS32_BAR_OFS 0xc4c 177a79b5e68SGabor Juhos #define GT_PCI0_CS20_BAR_OFS 0xc50 178a79b5e68SGabor Juhos #define GT_PCI0_CS3BT_BAR_OFS 0xc54 179a79b5e68SGabor Juhos #define GT_PCI0_SSCS10_BAR_OFS 0xc58 180a79b5e68SGabor Juhos #define GT_PCI0_SSCS32_BAR_OFS 0xc5c 181a79b5e68SGabor Juhos 182a79b5e68SGabor Juhos #define GT_PCI0_SCS3BT_BAR_OFS 0xc64 183a79b5e68SGabor Juhos 184a79b5e68SGabor Juhos #define GT_PCI1_CMD_OFS 0xc80 185a79b5e68SGabor Juhos #define GT_PCI1_TOR_OFS 0xc84 186a79b5e68SGabor Juhos #define GT_PCI1_BS_SCS10_OFS 0xc88 187a79b5e68SGabor Juhos #define GT_PCI1_BS_SCS32_OFS 0xc8c 188a79b5e68SGabor Juhos #define GT_PCI1_BS_CS20_OFS 0xc90 189a79b5e68SGabor Juhos #define GT_PCI1_BS_CS3BT_OFS 0xc94 190a79b5e68SGabor Juhos 191a79b5e68SGabor Juhos #define GT_PCI1_BARE_OFS 0xcbc 192a79b5e68SGabor Juhos #define GT_PCI1_PREFMBR_OFS 0xcc0 193a79b5e68SGabor Juhos 194a79b5e68SGabor Juhos #define GT_PCI1_SCS10_BAR_OFS 0xcc8 195a79b5e68SGabor Juhos #define GT_PCI1_SCS32_BAR_OFS 0xccc 196a79b5e68SGabor Juhos #define GT_PCI1_CS20_BAR_OFS 0xcd0 197a79b5e68SGabor Juhos #define GT_PCI1_CS3BT_BAR_OFS 0xcd4 198a79b5e68SGabor Juhos #define GT_PCI1_SSCS10_BAR_OFS 0xcd8 199a79b5e68SGabor Juhos #define GT_PCI1_SSCS32_BAR_OFS 0xcdc 200a79b5e68SGabor Juhos 201a79b5e68SGabor Juhos #define GT_PCI1_SCS3BT_BAR_OFS 0xce4 202a79b5e68SGabor Juhos 203a79b5e68SGabor Juhos #define GT_PCI1_CFGADDR_OFS 0xcf0 204a79b5e68SGabor Juhos #define GT_PCI1_CFGDATA_OFS 0xcf4 205a79b5e68SGabor Juhos #define GT_PCI0_CFGADDR_OFS 0xcf8 206a79b5e68SGabor Juhos #define GT_PCI0_CFGDATA_OFS 0xcfc 207a79b5e68SGabor Juhos 208a79b5e68SGabor Juhos /* Interrupts. */ 209a79b5e68SGabor Juhos #define GT_INTRCAUSE_OFS 0xc18 210a79b5e68SGabor Juhos #define GT_INTRMASK_OFS 0xc1c 211a79b5e68SGabor Juhos 212a79b5e68SGabor Juhos #define GT_PCI0_ICMASK_OFS 0xc24 213a79b5e68SGabor Juhos #define GT_PCI0_SERR0MASK_OFS 0xc28 214a79b5e68SGabor Juhos 215a79b5e68SGabor Juhos #define GT_CPU_INTSEL_OFS 0xc70 216a79b5e68SGabor Juhos #define GT_PCI0_INTSEL_OFS 0xc74 217a79b5e68SGabor Juhos 218a79b5e68SGabor Juhos #define GT_HINTRCAUSE_OFS 0xc98 219a79b5e68SGabor Juhos #define GT_HINTRMASK_OFS 0xc9c 220a79b5e68SGabor Juhos 221a79b5e68SGabor Juhos #define GT_PCI0_HICMASK_OFS 0xca4 222a79b5e68SGabor Juhos #define GT_PCI1_SERR1MASK_OFS 0xca8 223a79b5e68SGabor Juhos 224a79b5e68SGabor Juhos 225a79b5e68SGabor Juhos /* 226a79b5e68SGabor Juhos * I2O Support Registers 227a79b5e68SGabor Juhos */ 228a79b5e68SGabor Juhos #define INBOUND_MESSAGE_REGISTER0_PCI_SIDE 0x010 229a79b5e68SGabor Juhos #define INBOUND_MESSAGE_REGISTER1_PCI_SIDE 0x014 230a79b5e68SGabor Juhos #define OUTBOUND_MESSAGE_REGISTER0_PCI_SIDE 0x018 231a79b5e68SGabor Juhos #define OUTBOUND_MESSAGE_REGISTER1_PCI_SIDE 0x01c 232a79b5e68SGabor Juhos #define INBOUND_DOORBELL_REGISTER_PCI_SIDE 0x020 233a79b5e68SGabor Juhos #define INBOUND_INTERRUPT_CAUSE_REGISTER_PCI_SIDE 0x024 234a79b5e68SGabor Juhos #define INBOUND_INTERRUPT_MASK_REGISTER_PCI_SIDE 0x028 235a79b5e68SGabor Juhos #define OUTBOUND_DOORBELL_REGISTER_PCI_SIDE 0x02c 236a79b5e68SGabor Juhos #define OUTBOUND_INTERRUPT_CAUSE_REGISTER_PCI_SIDE 0x030 237a79b5e68SGabor Juhos #define OUTBOUND_INTERRUPT_MASK_REGISTER_PCI_SIDE 0x034 238a79b5e68SGabor Juhos #define INBOUND_QUEUE_PORT_VIRTUAL_REGISTER_PCI_SIDE 0x040 239a79b5e68SGabor Juhos #define OUTBOUND_QUEUE_PORT_VIRTUAL_REGISTER_PCI_SIDE 0x044 240a79b5e68SGabor Juhos #define QUEUE_CONTROL_REGISTER_PCI_SIDE 0x050 241a79b5e68SGabor Juhos #define QUEUE_BASE_ADDRESS_REGISTER_PCI_SIDE 0x054 242a79b5e68SGabor Juhos #define INBOUND_FREE_HEAD_POINTER_REGISTER_PCI_SIDE 0x060 243a79b5e68SGabor Juhos #define INBOUND_FREE_TAIL_POINTER_REGISTER_PCI_SIDE 0x064 244a79b5e68SGabor Juhos #define INBOUND_POST_HEAD_POINTER_REGISTER_PCI_SIDE 0x068 245a79b5e68SGabor Juhos #define INBOUND_POST_TAIL_POINTER_REGISTER_PCI_SIDE 0x06c 246a79b5e68SGabor Juhos #define OUTBOUND_FREE_HEAD_POINTER_REGISTER_PCI_SIDE 0x070 247a79b5e68SGabor Juhos #define OUTBOUND_FREE_TAIL_POINTER_REGISTER_PCI_SIDE 0x074 248a79b5e68SGabor Juhos #define OUTBOUND_POST_HEAD_POINTER_REGISTER_PCI_SIDE 0x078 249a79b5e68SGabor Juhos #define OUTBOUND_POST_TAIL_POINTER_REGISTER_PCI_SIDE 0x07c 250a79b5e68SGabor Juhos 251a79b5e68SGabor Juhos #define INBOUND_MESSAGE_REGISTER0_CPU_SIDE 0x1c10 252a79b5e68SGabor Juhos #define INBOUND_MESSAGE_REGISTER1_CPU_SIDE 0x1c14 253a79b5e68SGabor Juhos #define OUTBOUND_MESSAGE_REGISTER0_CPU_SIDE 0x1c18 254a79b5e68SGabor Juhos #define OUTBOUND_MESSAGE_REGISTER1_CPU_SIDE 0x1c1c 255a79b5e68SGabor Juhos #define INBOUND_DOORBELL_REGISTER_CPU_SIDE 0x1c20 256a79b5e68SGabor Juhos #define INBOUND_INTERRUPT_CAUSE_REGISTER_CPU_SIDE 0x1c24 257a79b5e68SGabor Juhos #define INBOUND_INTERRUPT_MASK_REGISTER_CPU_SIDE 0x1c28 258a79b5e68SGabor Juhos #define OUTBOUND_DOORBELL_REGISTER_CPU_SIDE 0x1c2c 259a79b5e68SGabor Juhos #define OUTBOUND_INTERRUPT_CAUSE_REGISTER_CPU_SIDE 0x1c30 260a79b5e68SGabor Juhos #define OUTBOUND_INTERRUPT_MASK_REGISTER_CPU_SIDE 0x1c34 261a79b5e68SGabor Juhos #define INBOUND_QUEUE_PORT_VIRTUAL_REGISTER_CPU_SIDE 0x1c40 262a79b5e68SGabor Juhos #define OUTBOUND_QUEUE_PORT_VIRTUAL_REGISTER_CPU_SIDE 0x1c44 263a79b5e68SGabor Juhos #define QUEUE_CONTROL_REGISTER_CPU_SIDE 0x1c50 264a79b5e68SGabor Juhos #define QUEUE_BASE_ADDRESS_REGISTER_CPU_SIDE 0x1c54 265a79b5e68SGabor Juhos #define INBOUND_FREE_HEAD_POINTER_REGISTER_CPU_SIDE 0x1c60 266a79b5e68SGabor Juhos #define INBOUND_FREE_TAIL_POINTER_REGISTER_CPU_SIDE 0x1c64 267a79b5e68SGabor Juhos #define INBOUND_POST_HEAD_POINTER_REGISTER_CPU_SIDE 0x1c68 268a79b5e68SGabor Juhos #define INBOUND_POST_TAIL_POINTER_REGISTER_CPU_SIDE 0x1c6c 269a79b5e68SGabor Juhos #define OUTBOUND_FREE_HEAD_POINTER_REGISTER_CPU_SIDE 0x1c70 270a79b5e68SGabor Juhos #define OUTBOUND_FREE_TAIL_POINTER_REGISTER_CPU_SIDE 0x1c74 271a79b5e68SGabor Juhos #define OUTBOUND_POST_HEAD_POINTER_REGISTER_CPU_SIDE 0x1c78 272a79b5e68SGabor Juhos #define OUTBOUND_POST_TAIL_POINTER_REGISTER_CPU_SIDE 0x1c7c 273a79b5e68SGabor Juhos 274a79b5e68SGabor Juhos /* 275a79b5e68SGabor Juhos * Register encodings 276a79b5e68SGabor Juhos */ 277a79b5e68SGabor Juhos #define GT_CPU_ENDIAN_SHF 12 278a79b5e68SGabor Juhos #define GT_CPU_ENDIAN_MSK (MSK(1) << GT_CPU_ENDIAN_SHF) 279a79b5e68SGabor Juhos #define GT_CPU_ENDIAN_BIT GT_CPU_ENDIAN_MSK 280a79b5e68SGabor Juhos #define GT_CPU_WR_SHF 16 281a79b5e68SGabor Juhos #define GT_CPU_WR_MSK (MSK(1) << GT_CPU_WR_SHF) 282a79b5e68SGabor Juhos #define GT_CPU_WR_BIT GT_CPU_WR_MSK 283a79b5e68SGabor Juhos #define GT_CPU_WR_DXDXDXDX 0 284a79b5e68SGabor Juhos #define GT_CPU_WR_DDDD 1 285a79b5e68SGabor Juhos 286a79b5e68SGabor Juhos 287a79b5e68SGabor Juhos #define GT_PCI_DCRM_SHF 21 288a79b5e68SGabor Juhos #define GT_PCI_LD_SHF 0 289a79b5e68SGabor Juhos #define GT_PCI_LD_MSK (MSK(15) << GT_PCI_LD_SHF) 290a79b5e68SGabor Juhos #define GT_PCI_HD_SHF 0 291a79b5e68SGabor Juhos #define GT_PCI_HD_MSK (MSK(7) << GT_PCI_HD_SHF) 292a79b5e68SGabor Juhos #define GT_PCI_REMAP_SHF 0 293a79b5e68SGabor Juhos #define GT_PCI_REMAP_MSK (MSK(11) << GT_PCI_REMAP_SHF) 294a79b5e68SGabor Juhos 295a79b5e68SGabor Juhos 296a79b5e68SGabor Juhos #define GT_CFGADDR_CFGEN_SHF 31 297a79b5e68SGabor Juhos #define GT_CFGADDR_CFGEN_MSK (MSK(1) << GT_CFGADDR_CFGEN_SHF) 298a79b5e68SGabor Juhos #define GT_CFGADDR_CFGEN_BIT GT_CFGADDR_CFGEN_MSK 299a79b5e68SGabor Juhos 300a79b5e68SGabor Juhos #define GT_CFGADDR_BUSNUM_SHF 16 301a79b5e68SGabor Juhos #define GT_CFGADDR_BUSNUM_MSK (MSK(8) << GT_CFGADDR_BUSNUM_SHF) 302a79b5e68SGabor Juhos 303a79b5e68SGabor Juhos #define GT_CFGADDR_DEVNUM_SHF 11 304a79b5e68SGabor Juhos #define GT_CFGADDR_DEVNUM_MSK (MSK(5) << GT_CFGADDR_DEVNUM_SHF) 305a79b5e68SGabor Juhos 306a79b5e68SGabor Juhos #define GT_CFGADDR_FUNCNUM_SHF 8 307a79b5e68SGabor Juhos #define GT_CFGADDR_FUNCNUM_MSK (MSK(3) << GT_CFGADDR_FUNCNUM_SHF) 308a79b5e68SGabor Juhos 309a79b5e68SGabor Juhos #define GT_CFGADDR_REGNUM_SHF 2 310a79b5e68SGabor Juhos #define GT_CFGADDR_REGNUM_MSK (MSK(6) << GT_CFGADDR_REGNUM_SHF) 311a79b5e68SGabor Juhos 312a79b5e68SGabor Juhos 313a79b5e68SGabor Juhos #define GT_SDRAM_BM_ORDER_SHF 2 314a79b5e68SGabor Juhos #define GT_SDRAM_BM_ORDER_MSK (MSK(1) << GT_SDRAM_BM_ORDER_SHF) 315a79b5e68SGabor Juhos #define GT_SDRAM_BM_ORDER_BIT GT_SDRAM_BM_ORDER_MSK 316a79b5e68SGabor Juhos #define GT_SDRAM_BM_ORDER_SUB 1 317a79b5e68SGabor Juhos #define GT_SDRAM_BM_ORDER_LIN 0 318a79b5e68SGabor Juhos 319a79b5e68SGabor Juhos #define GT_SDRAM_BM_RSVD_ALL1 0xffb 320a79b5e68SGabor Juhos 321a79b5e68SGabor Juhos 322a79b5e68SGabor Juhos #define GT_SDRAM_ADDRDECODE_ADDR_SHF 0 323a79b5e68SGabor Juhos #define GT_SDRAM_ADDRDECODE_ADDR_MSK (MSK(3) << GT_SDRAM_ADDRDECODE_ADDR_SHF) 324a79b5e68SGabor Juhos #define GT_SDRAM_ADDRDECODE_ADDR_0 0 325a79b5e68SGabor Juhos #define GT_SDRAM_ADDRDECODE_ADDR_1 1 326a79b5e68SGabor Juhos #define GT_SDRAM_ADDRDECODE_ADDR_2 2 327a79b5e68SGabor Juhos #define GT_SDRAM_ADDRDECODE_ADDR_3 3 328a79b5e68SGabor Juhos #define GT_SDRAM_ADDRDECODE_ADDR_4 4 329a79b5e68SGabor Juhos #define GT_SDRAM_ADDRDECODE_ADDR_5 5 330a79b5e68SGabor Juhos #define GT_SDRAM_ADDRDECODE_ADDR_6 6 331a79b5e68SGabor Juhos #define GT_SDRAM_ADDRDECODE_ADDR_7 7 332a79b5e68SGabor Juhos 333a79b5e68SGabor Juhos 334a79b5e68SGabor Juhos #define GT_SDRAM_B0_CASLAT_SHF 0 335a79b5e68SGabor Juhos #define GT_SDRAM_B0_CASLAT_MSK (MSK(2) << GT_SDRAM_B0__SHF) 336a79b5e68SGabor Juhos #define GT_SDRAM_B0_CASLAT_2 1 337a79b5e68SGabor Juhos #define GT_SDRAM_B0_CASLAT_3 2 338a79b5e68SGabor Juhos 339a79b5e68SGabor Juhos #define GT_SDRAM_B0_FTDIS_SHF 2 340a79b5e68SGabor Juhos #define GT_SDRAM_B0_FTDIS_MSK (MSK(1) << GT_SDRAM_B0_FTDIS_SHF) 341a79b5e68SGabor Juhos #define GT_SDRAM_B0_FTDIS_BIT GT_SDRAM_B0_FTDIS_MSK 342a79b5e68SGabor Juhos 343a79b5e68SGabor Juhos #define GT_SDRAM_B0_SRASPRCHG_SHF 3 344a79b5e68SGabor Juhos #define GT_SDRAM_B0_SRASPRCHG_MSK (MSK(1) << GT_SDRAM_B0_SRASPRCHG_SHF) 345a79b5e68SGabor Juhos #define GT_SDRAM_B0_SRASPRCHG_BIT GT_SDRAM_B0_SRASPRCHG_MSK 346a79b5e68SGabor Juhos #define GT_SDRAM_B0_SRASPRCHG_2 0 347a79b5e68SGabor Juhos #define GT_SDRAM_B0_SRASPRCHG_3 1 348a79b5e68SGabor Juhos 349a79b5e68SGabor Juhos #define GT_SDRAM_B0_B0COMPAB_SHF 4 350a79b5e68SGabor Juhos #define GT_SDRAM_B0_B0COMPAB_MSK (MSK(1) << GT_SDRAM_B0_B0COMPAB_SHF) 351a79b5e68SGabor Juhos #define GT_SDRAM_B0_B0COMPAB_BIT GT_SDRAM_B0_B0COMPAB_MSK 352a79b5e68SGabor Juhos 353a79b5e68SGabor Juhos #define GT_SDRAM_B0_64BITINT_SHF 5 354a79b5e68SGabor Juhos #define GT_SDRAM_B0_64BITINT_MSK (MSK(1) << GT_SDRAM_B0_64BITINT_SHF) 355a79b5e68SGabor Juhos #define GT_SDRAM_B0_64BITINT_BIT GT_SDRAM_B0_64BITINT_MSK 356a79b5e68SGabor Juhos #define GT_SDRAM_B0_64BITINT_2 0 357a79b5e68SGabor Juhos #define GT_SDRAM_B0_64BITINT_4 1 358a79b5e68SGabor Juhos 359a79b5e68SGabor Juhos #define GT_SDRAM_B0_BW_SHF 6 360a79b5e68SGabor Juhos #define GT_SDRAM_B0_BW_MSK (MSK(1) << GT_SDRAM_B0_BW_SHF) 361a79b5e68SGabor Juhos #define GT_SDRAM_B0_BW_BIT GT_SDRAM_B0_BW_MSK 362a79b5e68SGabor Juhos #define GT_SDRAM_B0_BW_32 0 363a79b5e68SGabor Juhos #define GT_SDRAM_B0_BW_64 1 364a79b5e68SGabor Juhos 365a79b5e68SGabor Juhos #define GT_SDRAM_B0_BLODD_SHF 7 366a79b5e68SGabor Juhos #define GT_SDRAM_B0_BLODD_MSK (MSK(1) << GT_SDRAM_B0_BLODD_SHF) 367a79b5e68SGabor Juhos #define GT_SDRAM_B0_BLODD_BIT GT_SDRAM_B0_BLODD_MSK 368a79b5e68SGabor Juhos 369a79b5e68SGabor Juhos #define GT_SDRAM_B0_PAR_SHF 8 370a79b5e68SGabor Juhos #define GT_SDRAM_B0_PAR_MSK (MSK(1) << GT_SDRAM_B0_PAR_SHF) 371a79b5e68SGabor Juhos #define GT_SDRAM_B0_PAR_BIT GT_SDRAM_B0_PAR_MSK 372a79b5e68SGabor Juhos 373a79b5e68SGabor Juhos #define GT_SDRAM_B0_BYPASS_SHF 9 374a79b5e68SGabor Juhos #define GT_SDRAM_B0_BYPASS_MSK (MSK(1) << GT_SDRAM_B0_BYPASS_SHF) 375a79b5e68SGabor Juhos #define GT_SDRAM_B0_BYPASS_BIT GT_SDRAM_B0_BYPASS_MSK 376a79b5e68SGabor Juhos 377a79b5e68SGabor Juhos #define GT_SDRAM_B0_SRAS2SCAS_SHF 10 378a79b5e68SGabor Juhos #define GT_SDRAM_B0_SRAS2SCAS_MSK (MSK(1) << GT_SDRAM_B0_SRAS2SCAS_SHF) 379a79b5e68SGabor Juhos #define GT_SDRAM_B0_SRAS2SCAS_BIT GT_SDRAM_B0_SRAS2SCAS_MSK 380a79b5e68SGabor Juhos #define GT_SDRAM_B0_SRAS2SCAS_2 0 381a79b5e68SGabor Juhos #define GT_SDRAM_B0_SRAS2SCAS_3 1 382a79b5e68SGabor Juhos 383a79b5e68SGabor Juhos #define GT_SDRAM_B0_SIZE_SHF 11 384a79b5e68SGabor Juhos #define GT_SDRAM_B0_SIZE_MSK (MSK(1) << GT_SDRAM_B0_SIZE_SHF) 385a79b5e68SGabor Juhos #define GT_SDRAM_B0_SIZE_BIT GT_SDRAM_B0_SIZE_MSK 386a79b5e68SGabor Juhos #define GT_SDRAM_B0_SIZE_16M 0 387a79b5e68SGabor Juhos #define GT_SDRAM_B0_SIZE_64M 1 388a79b5e68SGabor Juhos 389a79b5e68SGabor Juhos #define GT_SDRAM_B0_EXTPAR_SHF 12 390a79b5e68SGabor Juhos #define GT_SDRAM_B0_EXTPAR_MSK (MSK(1) << GT_SDRAM_B0_EXTPAR_SHF) 391a79b5e68SGabor Juhos #define GT_SDRAM_B0_EXTPAR_BIT GT_SDRAM_B0_EXTPAR_MSK 392a79b5e68SGabor Juhos 393a79b5e68SGabor Juhos #define GT_SDRAM_B0_BLEN_SHF 13 394a79b5e68SGabor Juhos #define GT_SDRAM_B0_BLEN_MSK (MSK(1) << GT_SDRAM_B0_BLEN_SHF) 395a79b5e68SGabor Juhos #define GT_SDRAM_B0_BLEN_BIT GT_SDRAM_B0_BLEN_MSK 396a79b5e68SGabor Juhos #define GT_SDRAM_B0_BLEN_8 0 397a79b5e68SGabor Juhos #define GT_SDRAM_B0_BLEN_4 1 398a79b5e68SGabor Juhos 399a79b5e68SGabor Juhos 400a79b5e68SGabor Juhos #define GT_SDRAM_CFG_REFINT_SHF 0 401a79b5e68SGabor Juhos #define GT_SDRAM_CFG_REFINT_MSK (MSK(14) << GT_SDRAM_CFG_REFINT_SHF) 402a79b5e68SGabor Juhos 403a79b5e68SGabor Juhos #define GT_SDRAM_CFG_NINTERLEAVE_SHF 14 404a79b5e68SGabor Juhos #define GT_SDRAM_CFG_NINTERLEAVE_MSK (MSK(1) << GT_SDRAM_CFG_NINTERLEAVE_SHF) 405a79b5e68SGabor Juhos #define GT_SDRAM_CFG_NINTERLEAVE_BIT GT_SDRAM_CFG_NINTERLEAVE_MSK 406a79b5e68SGabor Juhos 407a79b5e68SGabor Juhos #define GT_SDRAM_CFG_RMW_SHF 15 408a79b5e68SGabor Juhos #define GT_SDRAM_CFG_RMW_MSK (MSK(1) << GT_SDRAM_CFG_RMW_SHF) 409a79b5e68SGabor Juhos #define GT_SDRAM_CFG_RMW_BIT GT_SDRAM_CFG_RMW_MSK 410a79b5e68SGabor Juhos 411a79b5e68SGabor Juhos #define GT_SDRAM_CFG_NONSTAGREF_SHF 16 412a79b5e68SGabor Juhos #define GT_SDRAM_CFG_NONSTAGREF_MSK (MSK(1) << GT_SDRAM_CFG_NONSTAGREF_SHF) 413a79b5e68SGabor Juhos #define GT_SDRAM_CFG_NONSTAGREF_BIT GT_SDRAM_CFG_NONSTAGREF_MSK 414a79b5e68SGabor Juhos 415a79b5e68SGabor Juhos #define GT_SDRAM_CFG_DUPCNTL_SHF 19 416a79b5e68SGabor Juhos #define GT_SDRAM_CFG_DUPCNTL_MSK (MSK(1) << GT_SDRAM_CFG_DUPCNTL_SHF) 417a79b5e68SGabor Juhos #define GT_SDRAM_CFG_DUPCNTL_BIT GT_SDRAM_CFG_DUPCNTL_MSK 418a79b5e68SGabor Juhos 419a79b5e68SGabor Juhos #define GT_SDRAM_CFG_DUPBA_SHF 20 420a79b5e68SGabor Juhos #define GT_SDRAM_CFG_DUPBA_MSK (MSK(1) << GT_SDRAM_CFG_DUPBA_SHF) 421a79b5e68SGabor Juhos #define GT_SDRAM_CFG_DUPBA_BIT GT_SDRAM_CFG_DUPBA_MSK 422a79b5e68SGabor Juhos 423a79b5e68SGabor Juhos #define GT_SDRAM_CFG_DUPEOT0_SHF 21 424a79b5e68SGabor Juhos #define GT_SDRAM_CFG_DUPEOT0_MSK (MSK(1) << GT_SDRAM_CFG_DUPEOT0_SHF) 425a79b5e68SGabor Juhos #define GT_SDRAM_CFG_DUPEOT0_BIT GT_SDRAM_CFG_DUPEOT0_MSK 426a79b5e68SGabor Juhos 427a79b5e68SGabor Juhos #define GT_SDRAM_CFG_DUPEOT1_SHF 22 428a79b5e68SGabor Juhos #define GT_SDRAM_CFG_DUPEOT1_MSK (MSK(1) << GT_SDRAM_CFG_DUPEOT1_SHF) 429a79b5e68SGabor Juhos #define GT_SDRAM_CFG_DUPEOT1_BIT GT_SDRAM_CFG_DUPEOT1_MSK 430a79b5e68SGabor Juhos 431a79b5e68SGabor Juhos #define GT_SDRAM_OPMODE_OP_SHF 0 432a79b5e68SGabor Juhos #define GT_SDRAM_OPMODE_OP_MSK (MSK(3) << GT_SDRAM_OPMODE_OP_SHF) 433a79b5e68SGabor Juhos #define GT_SDRAM_OPMODE_OP_NORMAL 0 434a79b5e68SGabor Juhos #define GT_SDRAM_OPMODE_OP_NOP 1 435a79b5e68SGabor Juhos #define GT_SDRAM_OPMODE_OP_PRCHG 2 436a79b5e68SGabor Juhos #define GT_SDRAM_OPMODE_OP_MODE 3 437a79b5e68SGabor Juhos #define GT_SDRAM_OPMODE_OP_CBR 4 438a79b5e68SGabor Juhos 439a79b5e68SGabor Juhos #define GT_TC_CONTROL_ENTC0_SHF 0 440a79b5e68SGabor Juhos #define GT_TC_CONTROL_ENTC0_MSK (MSK(1) << GT_TC_CONTROL_ENTC0_SHF) 441a79b5e68SGabor Juhos #define GT_TC_CONTROL_ENTC0_BIT GT_TC_CONTROL_ENTC0_MSK 442a79b5e68SGabor Juhos #define GT_TC_CONTROL_SELTC0_SHF 1 443a79b5e68SGabor Juhos #define GT_TC_CONTROL_SELTC0_MSK (MSK(1) << GT_TC_CONTROL_SELTC0_SHF) 444a79b5e68SGabor Juhos #define GT_TC_CONTROL_SELTC0_BIT GT_TC_CONTROL_SELTC0_MSK 445a79b5e68SGabor Juhos 446a79b5e68SGabor Juhos 447a79b5e68SGabor Juhos #define GT_PCI0_BARE_SWSCS3BOOTDIS_SHF 0 448a79b5e68SGabor Juhos #define GT_PCI0_BARE_SWSCS3BOOTDIS_MSK \ 449a79b5e68SGabor Juhos (MSK(1) << GT_PCI0_BARE_SWSCS3BOOTDIS_SHF) 450a79b5e68SGabor Juhos #define GT_PCI0_BARE_SWSCS3BOOTDIS_BIT GT_PCI0_BARE_SWSCS3BOOTDIS_MSK 451a79b5e68SGabor Juhos 452a79b5e68SGabor Juhos #define GT_PCI0_BARE_SWSCS32DIS_SHF 1 453a79b5e68SGabor Juhos #define GT_PCI0_BARE_SWSCS32DIS_MSK (MSK(1) << GT_PCI0_BARE_SWSCS32DIS_SHF) 454a79b5e68SGabor Juhos #define GT_PCI0_BARE_SWSCS32DIS_BIT GT_PCI0_BARE_SWSCS32DIS_MSK 455a79b5e68SGabor Juhos 456a79b5e68SGabor Juhos #define GT_PCI0_BARE_SWSCS10DIS_SHF 2 457a79b5e68SGabor Juhos #define GT_PCI0_BARE_SWSCS10DIS_MSK (MSK(1) << GT_PCI0_BARE_SWSCS10DIS_SHF) 458a79b5e68SGabor Juhos #define GT_PCI0_BARE_SWSCS10DIS_BIT GT_PCI0_BARE_SWSCS10DIS_MSK 459a79b5e68SGabor Juhos 460a79b5e68SGabor Juhos #define GT_PCI0_BARE_INTIODIS_SHF 3 461a79b5e68SGabor Juhos #define GT_PCI0_BARE_INTIODIS_MSK (MSK(1) << GT_PCI0_BARE_INTIODIS_SHF) 462a79b5e68SGabor Juhos #define GT_PCI0_BARE_INTIODIS_BIT GT_PCI0_BARE_INTIODIS_MSK 463a79b5e68SGabor Juhos 464a79b5e68SGabor Juhos #define GT_PCI0_BARE_INTMEMDIS_SHF 4 465a79b5e68SGabor Juhos #define GT_PCI0_BARE_INTMEMDIS_MSK (MSK(1) << GT_PCI0_BARE_INTMEMDIS_SHF) 466a79b5e68SGabor Juhos #define GT_PCI0_BARE_INTMEMDIS_BIT GT_PCI0_BARE_INTMEMDIS_MSK 467a79b5e68SGabor Juhos 468a79b5e68SGabor Juhos #define GT_PCI0_BARE_CS3BOOTDIS_SHF 5 469a79b5e68SGabor Juhos #define GT_PCI0_BARE_CS3BOOTDIS_MSK (MSK(1) << GT_PCI0_BARE_CS3BOOTDIS_SHF) 470a79b5e68SGabor Juhos #define GT_PCI0_BARE_CS3BOOTDIS_BIT GT_PCI0_BARE_CS3BOOTDIS_MSK 471a79b5e68SGabor Juhos 472a79b5e68SGabor Juhos #define GT_PCI0_BARE_CS20DIS_SHF 6 473a79b5e68SGabor Juhos #define GT_PCI0_BARE_CS20DIS_MSK (MSK(1) << GT_PCI0_BARE_CS20DIS_SHF) 474a79b5e68SGabor Juhos #define GT_PCI0_BARE_CS20DIS_BIT GT_PCI0_BARE_CS20DIS_MSK 475a79b5e68SGabor Juhos 476a79b5e68SGabor Juhos #define GT_PCI0_BARE_SCS32DIS_SHF 7 477a79b5e68SGabor Juhos #define GT_PCI0_BARE_SCS32DIS_MSK (MSK(1) << GT_PCI0_BARE_SCS32DIS_SHF) 478a79b5e68SGabor Juhos #define GT_PCI0_BARE_SCS32DIS_BIT GT_PCI0_BARE_SCS32DIS_MSK 479a79b5e68SGabor Juhos 480a79b5e68SGabor Juhos #define GT_PCI0_BARE_SCS10DIS_SHF 8 481a79b5e68SGabor Juhos #define GT_PCI0_BARE_SCS10DIS_MSK (MSK(1) << GT_PCI0_BARE_SCS10DIS_SHF) 482a79b5e68SGabor Juhos #define GT_PCI0_BARE_SCS10DIS_BIT GT_PCI0_BARE_SCS10DIS_MSK 483a79b5e68SGabor Juhos 484a79b5e68SGabor Juhos 485a79b5e68SGabor Juhos #define GT_INTRCAUSE_MASABORT0_SHF 18 486a79b5e68SGabor Juhos #define GT_INTRCAUSE_MASABORT0_MSK (MSK(1) << GT_INTRCAUSE_MASABORT0_SHF) 487a79b5e68SGabor Juhos #define GT_INTRCAUSE_MASABORT0_BIT GT_INTRCAUSE_MASABORT0_MSK 488a79b5e68SGabor Juhos 489a79b5e68SGabor Juhos #define GT_INTRCAUSE_TARABORT0_SHF 19 490a79b5e68SGabor Juhos #define GT_INTRCAUSE_TARABORT0_MSK (MSK(1) << GT_INTRCAUSE_TARABORT0_SHF) 491a79b5e68SGabor Juhos #define GT_INTRCAUSE_TARABORT0_BIT GT_INTRCAUSE_TARABORT0_MSK 492a79b5e68SGabor Juhos 493a79b5e68SGabor Juhos 494a79b5e68SGabor Juhos #define GT_PCI0_CFGADDR_REGNUM_SHF 2 495a79b5e68SGabor Juhos #define GT_PCI0_CFGADDR_REGNUM_MSK (MSK(6) << GT_PCI0_CFGADDR_REGNUM_SHF) 496a79b5e68SGabor Juhos #define GT_PCI0_CFGADDR_FUNCTNUM_SHF 8 497a79b5e68SGabor Juhos #define GT_PCI0_CFGADDR_FUNCTNUM_MSK (MSK(3) << GT_PCI0_CFGADDR_FUNCTNUM_SHF) 498a79b5e68SGabor Juhos #define GT_PCI0_CFGADDR_DEVNUM_SHF 11 499a79b5e68SGabor Juhos #define GT_PCI0_CFGADDR_DEVNUM_MSK (MSK(5) << GT_PCI0_CFGADDR_DEVNUM_SHF) 500a79b5e68SGabor Juhos #define GT_PCI0_CFGADDR_BUSNUM_SHF 16 501a79b5e68SGabor Juhos #define GT_PCI0_CFGADDR_BUSNUM_MSK (MSK(8) << GT_PCI0_CFGADDR_BUSNUM_SHF) 502a79b5e68SGabor Juhos #define GT_PCI0_CFGADDR_CONFIGEN_SHF 31 503a79b5e68SGabor Juhos #define GT_PCI0_CFGADDR_CONFIGEN_MSK (MSK(1) << GT_PCI0_CFGADDR_CONFIGEN_SHF) 504a79b5e68SGabor Juhos #define GT_PCI0_CFGADDR_CONFIGEN_BIT GT_PCI0_CFGADDR_CONFIGEN_MSK 505a79b5e68SGabor Juhos 506a79b5e68SGabor Juhos #define GT_PCI0_CMD_MBYTESWAP_SHF 0 507a79b5e68SGabor Juhos #define GT_PCI0_CMD_MBYTESWAP_MSK (MSK(1) << GT_PCI0_CMD_MBYTESWAP_SHF) 508a79b5e68SGabor Juhos #define GT_PCI0_CMD_MBYTESWAP_BIT GT_PCI0_CMD_MBYTESWAP_MSK 509a79b5e68SGabor Juhos #define GT_PCI0_CMD_MWORDSWAP_SHF 10 510a79b5e68SGabor Juhos #define GT_PCI0_CMD_MWORDSWAP_MSK (MSK(1) << GT_PCI0_CMD_MWORDSWAP_SHF) 511a79b5e68SGabor Juhos #define GT_PCI0_CMD_MWORDSWAP_BIT GT_PCI0_CMD_MWORDSWAP_MSK 512a79b5e68SGabor Juhos #define GT_PCI0_CMD_SBYTESWAP_SHF 16 513a79b5e68SGabor Juhos #define GT_PCI0_CMD_SBYTESWAP_MSK (MSK(1) << GT_PCI0_CMD_SBYTESWAP_SHF) 514a79b5e68SGabor Juhos #define GT_PCI0_CMD_SBYTESWAP_BIT GT_PCI0_CMD_SBYTESWAP_MSK 515a79b5e68SGabor Juhos #define GT_PCI0_CMD_SWORDSWAP_SHF 11 516a79b5e68SGabor Juhos #define GT_PCI0_CMD_SWORDSWAP_MSK (MSK(1) << GT_PCI0_CMD_SWORDSWAP_SHF) 517a79b5e68SGabor Juhos #define GT_PCI0_CMD_SWORDSWAP_BIT GT_PCI0_CMD_SWORDSWAP_MSK 518a79b5e68SGabor Juhos 519a79b5e68SGabor Juhos #define GT_INTR_T0EXP_SHF 8 520a79b5e68SGabor Juhos #define GT_INTR_T0EXP_MSK (MSK(1) << GT_INTR_T0EXP_SHF) 521a79b5e68SGabor Juhos #define GT_INTR_T0EXP_BIT GT_INTR_T0EXP_MSK 522a79b5e68SGabor Juhos #define GT_INTR_RETRYCTR0_SHF 20 523a79b5e68SGabor Juhos #define GT_INTR_RETRYCTR0_MSK (MSK(1) << GT_INTR_RETRYCTR0_SHF) 524a79b5e68SGabor Juhos #define GT_INTR_RETRYCTR0_BIT GT_INTR_RETRYCTR0_MSK 525a79b5e68SGabor Juhos 526a79b5e68SGabor Juhos /* 527a79b5e68SGabor Juhos * Misc 528a79b5e68SGabor Juhos */ 529a79b5e68SGabor Juhos #define GT_DEF_PCI0_IO_BASE 0x10000000 530a79b5e68SGabor Juhos #define GT_DEF_PCI0_IO_SIZE 0x02000000 531a79b5e68SGabor Juhos #define GT_DEF_PCI0_MEM0_BASE 0x12000000 532a79b5e68SGabor Juhos #define GT_DEF_PCI0_MEM0_SIZE 0x02000000 533a79b5e68SGabor Juhos #define GT_DEF_BASE 0x14000000 534a79b5e68SGabor Juhos 535a79b5e68SGabor Juhos #define GT_MAX_BANKSIZE (256 * 1024 * 1024) /* Max 256MB bank */ 536a79b5e68SGabor Juhos #define GT_LATTIM_MIN 6 /* Minimum lat */ 537a79b5e68SGabor Juhos 538a79b5e68SGabor Juhos #endif /* _ASM_GT64120_H */ 539