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Searched refs:GPIOA (Results 1 – 12 of 12) sorted by relevance

/openbmc/u-boot/doc/device-tree-bindings/clock/
H A Dst,stm32-rcc.txt50 /* Gated clock, AHB1 bit 0 (GPIOA) */
52 clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOA)>
/openbmc/qemu/hw/avr/
H A Datmega.c28 GPIOA, GPIOB, GPIOC, GPIOD, GPIOE, GPIOF, enumerator
35 #define GPIO(n) (n + GPIOA)
102 [GPIOA] = { 0x20 },
/openbmc/openbmc/meta-ingrasys/meta-zaius/recipes-bsp/u-boot/u-boot-aspeed/
H A D0001-board-aspeed-Add-reset_phy-for-Zaius.patch29 + /* D3 in GPIOA/B/C/D direction and data registers */
/openbmc/u-boot/include/dt-bindings/clock/
H A Dstm32mp1-clks.h97 #define GPIOA 84 macro
/openbmc/u-boot/arch/arm/dts/
H A Dstm32mp157-pinctrl.dtsi25 clocks = <&rcc GPIOA>;
26 st,bank-name = "GPIOA";
H A Dstm32f746.dtsi135 clocks = <&rcc 0 STM32F7_AHB1_CLOCK(GPIOA)>;
136 st,bank-name = "GPIOA";
H A Dstm32f4-pinctrl.dtsi63 clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOA)>;
64 st,bank-name = "GPIOA";
H A Dstm32h743-pinctrl.dtsi60 st,bank-name = "GPIOA";
/openbmc/u-boot/doc/device-tree-bindings/pinctrl/
H A Dst,stm32-pinctrl.txt57 st,bank-name = "GPIOA";
/openbmc/u-boot/drivers/clk/
H A Dclk_stm32f.c423 case STM32F7_AHB1_CLOCK(GPIOA) ... STM32F7_AHB3_CLOCK(QSPI): in stm32_clk_get_rate()
H A Dclk_stm32mp1.c542 STM32MP1_CLK_SET_CLR(RCC_MP_AHB4ENSETR, 0, GPIOA, _UNKNOWN_SEL),
/openbmc/qemu/hw/misc/
H A Dstm32l4x5_rcc.c647 AHB2ENR_SET_ENABLE(GPIOA); in rcc_update_ahb2enr()