Searched refs:GPEX_NUM_IRQS (Results 1 – 11 of 11) sorted by relevance
35 #define GPEX_NUM_IRQS 4 macro63 qemu_irq irq[GPEX_NUM_IRQS];64 int irq_num[GPEX_NUM_IRQS];
321 uint32_t full_irq_map[GPEX_NUM_IRQS * GPEX_NUM_IRQS * 6] = {}; in create_pcie_irq_map()333 for (dev = 0; dev < GPEX_NUM_IRQS; dev++) { in create_pcie_irq_map()336 for (pin = 0; pin < GPEX_NUM_IRQS; pin++) { in create_pcie_irq_map()337 int irq_nr = irq_base + ((pin + PCI_SLOT(devfn)) % GPEX_NUM_IRQS); in create_pcie_irq_map()360 GPEX_NUM_IRQS * GPEX_NUM_IRQS * in create_pcie_irq_map()412 for (i = 0; i < GPEX_NUM_IRQS; i++) { in openrisc_virt_pcie_init()
53 if (index >= GPEX_NUM_IRQS) { in gpex_set_irq_num()131 for (i = 0; i < GPEX_NUM_IRQS; i++) { in gpex_host_realize()
444 uint32_t full_irq_map[GPEX_NUM_IRQS *GPEX_NUM_IRQS * 10] = {}; in fdt_add_pcie_irq_map_node()457 for (dev = 0; dev < GPEX_NUM_IRQS; dev++) { in fdt_add_pcie_irq_map_node()460 for (pin = 0; pin < GPEX_NUM_IRQS; pin++) { in fdt_add_pcie_irq_map_node()461 int irq_nr = 16 + ((pin + PCI_SLOT(devfn)) % GPEX_NUM_IRQS); in fdt_add_pcie_irq_map_node()485 GPEX_NUM_IRQS * GPEX_NUM_IRQS * in fdt_add_pcie_irq_map_node()744 for (i = 0; i < GPEX_NUM_IRQS; i++) { in virt_devices_init()
96 for (i = 0; i < GPEX_NUM_IRQS; i++) { in create_pcie()
171 uint32_t full_irq_map[GPEX_NUM_IRQS * GPEX_NUM_IRQS * in create_pcie_irq_map()183 for (dev = 0; dev < GPEX_NUM_IRQS; dev++) { in create_pcie_irq_map()186 for (pin = 0; pin < GPEX_NUM_IRQS; pin++) { in create_pcie_irq_map()187 int irq_nr = PCIE_IRQ + ((pin + PCI_SLOT(devfn)) % GPEX_NUM_IRQS); in create_pcie_irq_map()213 GPEX_NUM_IRQS * GPEX_NUM_IRQS * in create_pcie_irq_map()1185 for (i = 0; i < GPEX_NUM_IRQS; i++) { in gpex_pcie_init()
172 for (i = 0; i < GPEX_NUM_IRQS; i++) { in xenpvh_gpex_init()
461 for (i = 0; i < GPEX_NUM_IRQS; i++) { in loongson3_virt_devices_init()
142 for (i = 0; i < GPEX_NUM_IRQS; i++) { in create_gpex()
676 for (i = 0; i < GPEX_NUM_IRQS; i++) { in create_pcie()
1550 for (i = 0; i < GPEX_NUM_IRQS; i++) { in create_pcie()