1d9e8553bSMax Filippov /*
2d9e8553bSMax Filippov * Copyright (c) 2019, Max Filippov, Open Source and Linux Lab.
3d9e8553bSMax Filippov * All rights reserved.
4d9e8553bSMax Filippov *
5d9e8553bSMax Filippov * Redistribution and use in source and binary forms, with or without
6d9e8553bSMax Filippov * modification, are permitted provided that the following conditions are met:
7d9e8553bSMax Filippov * * Redistributions of source code must retain the above copyright
8d9e8553bSMax Filippov * notice, this list of conditions and the following disclaimer.
9d9e8553bSMax Filippov * * Redistributions in binary form must reproduce the above copyright
10d9e8553bSMax Filippov * notice, this list of conditions and the following disclaimer in the
11d9e8553bSMax Filippov * documentation and/or other materials provided with the distribution.
12d9e8553bSMax Filippov * * Neither the name of the Open Source and Linux Lab nor the
13d9e8553bSMax Filippov * names of its contributors may be used to endorse or promote products
14d9e8553bSMax Filippov * derived from this software without specific prior written permission.
15d9e8553bSMax Filippov *
16d9e8553bSMax Filippov * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
17d9e8553bSMax Filippov * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18d9e8553bSMax Filippov * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19d9e8553bSMax Filippov * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
20d9e8553bSMax Filippov * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
21d9e8553bSMax Filippov * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22d9e8553bSMax Filippov * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
23d9e8553bSMax Filippov * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24d9e8553bSMax Filippov * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
25d9e8553bSMax Filippov * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26d9e8553bSMax Filippov */
27d9e8553bSMax Filippov
28d9e8553bSMax Filippov #include "qemu/osdep.h"
29d9e8553bSMax Filippov #include "qapi/error.h"
30d9e8553bSMax Filippov #include "sysemu/reset.h"
31d9e8553bSMax Filippov #include "hw/boards.h"
32d9e8553bSMax Filippov #include "hw/loader.h"
33d9e8553bSMax Filippov #include "hw/pci-host/gpex.h"
34d9e8553bSMax Filippov #include "net/net.h"
35d9e8553bSMax Filippov #include "elf.h"
36d9e8553bSMax Filippov #include "exec/memory.h"
37d9e8553bSMax Filippov #include "qemu/error-report.h"
38d9e8553bSMax Filippov #include "xtensa_memory.h"
39d9e8553bSMax Filippov #include "xtensa_sim.h"
40d9e8553bSMax Filippov
create_pcie(MachineState * ms,CPUXtensaState * env,int irq_base,hwaddr addr_base)4169720ff2SThomas Huth static void create_pcie(MachineState *ms, CPUXtensaState *env, int irq_base,
4269720ff2SThomas Huth hwaddr addr_base)
43d9e8553bSMax Filippov {
44d9e8553bSMax Filippov hwaddr base_ecam = addr_base + 0x00100000;
45d9e8553bSMax Filippov hwaddr size_ecam = 0x03f00000;
46d9e8553bSMax Filippov hwaddr base_pio = addr_base + 0x00000000;
47d9e8553bSMax Filippov hwaddr size_pio = 0x00010000;
48d9e8553bSMax Filippov hwaddr base_mmio = addr_base + 0x04000000;
49d9e8553bSMax Filippov hwaddr size_mmio = 0x08000000;
50d9e8553bSMax Filippov
51d9e8553bSMax Filippov MemoryRegion *ecam_alias;
52d9e8553bSMax Filippov MemoryRegion *ecam_reg;
53d9e8553bSMax Filippov MemoryRegion *pio_alias;
54d9e8553bSMax Filippov MemoryRegion *pio_reg;
55d9e8553bSMax Filippov MemoryRegion *mmio_alias;
56d9e8553bSMax Filippov MemoryRegion *mmio_reg;
57d9e8553bSMax Filippov
5869720ff2SThomas Huth MachineClass *mc = MACHINE_GET_CLASS(ms);
59d9e8553bSMax Filippov DeviceState *dev;
60d9e8553bSMax Filippov PCIHostState *pci;
61d9e8553bSMax Filippov qemu_irq *extints;
62d9e8553bSMax Filippov int i;
63d9e8553bSMax Filippov
643e80f690SMarkus Armbruster dev = qdev_new(TYPE_GPEX_HOST);
653c6ef471SMarkus Armbruster sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
66d9e8553bSMax Filippov
67d9e8553bSMax Filippov /* Map only the first size_ecam bytes of ECAM space. */
68d9e8553bSMax Filippov ecam_alias = g_new0(MemoryRegion, 1);
69d9e8553bSMax Filippov ecam_reg = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0);
70d9e8553bSMax Filippov memory_region_init_alias(ecam_alias, OBJECT(dev), "pcie-ecam",
71d9e8553bSMax Filippov ecam_reg, 0, size_ecam);
72d9e8553bSMax Filippov memory_region_add_subregion(get_system_memory(), base_ecam, ecam_alias);
73d9e8553bSMax Filippov
74d9e8553bSMax Filippov /*
75d9e8553bSMax Filippov * Map the MMIO window into system address space so as to expose
76d9e8553bSMax Filippov * the section of PCI MMIO space which starts at the same base address
77d9e8553bSMax Filippov * (ie 1:1 mapping for that part of PCI MMIO space visible through
78d9e8553bSMax Filippov * the window).
79d9e8553bSMax Filippov */
80d9e8553bSMax Filippov mmio_alias = g_new0(MemoryRegion, 1);
81d9e8553bSMax Filippov mmio_reg = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 1);
82d9e8553bSMax Filippov memory_region_init_alias(mmio_alias, OBJECT(dev), "pcie-mmio",
83d9e8553bSMax Filippov mmio_reg, base_mmio, size_mmio);
84d9e8553bSMax Filippov memory_region_add_subregion(get_system_memory(), base_mmio, mmio_alias);
85d9e8553bSMax Filippov
86d9e8553bSMax Filippov /* Map IO port space. */
87d9e8553bSMax Filippov pio_alias = g_new0(MemoryRegion, 1);
88d9e8553bSMax Filippov pio_reg = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 2);
89d9e8553bSMax Filippov memory_region_init_alias(pio_alias, OBJECT(dev), "pcie-pio",
90d9e8553bSMax Filippov pio_reg, 0, size_pio);
91d9e8553bSMax Filippov memory_region_add_subregion(get_system_memory(), base_pio, pio_alias);
92d9e8553bSMax Filippov
93d9e8553bSMax Filippov /* Connect IRQ lines. */
94d9e8553bSMax Filippov extints = xtensa_get_extints(env);
95d9e8553bSMax Filippov
96d9e8553bSMax Filippov for (i = 0; i < GPEX_NUM_IRQS; i++) {
97d9e8553bSMax Filippov void *q = extints[irq_base + i];
98d9e8553bSMax Filippov
99d9e8553bSMax Filippov sysbus_connect_irq(SYS_BUS_DEVICE(dev), i, q);
100d9e8553bSMax Filippov gpex_set_irq_num(GPEX_HOST(dev), i, irq_base + i);
101d9e8553bSMax Filippov }
102d9e8553bSMax Filippov
103d9e8553bSMax Filippov pci = PCI_HOST_BRIDGE(dev);
104d9e8553bSMax Filippov if (pci->bus) {
105*18639296SDavid Woodhouse pci_init_nic_devices(pci->bus, mc->default_nic);
106d9e8553bSMax Filippov }
107d9e8553bSMax Filippov }
108d9e8553bSMax Filippov
xtensa_virt_init(MachineState * machine)109d9e8553bSMax Filippov static void xtensa_virt_init(MachineState *machine)
110d9e8553bSMax Filippov {
111d9e8553bSMax Filippov XtensaCPU *cpu = xtensa_sim_common_init(machine);
112d9e8553bSMax Filippov CPUXtensaState *env = &cpu->env;
113d9e8553bSMax Filippov
11469720ff2SThomas Huth create_pcie(machine, env, 0, 0xf0000000);
115d9e8553bSMax Filippov xtensa_sim_load_kernel(cpu, machine);
116d9e8553bSMax Filippov }
117d9e8553bSMax Filippov
xtensa_virt_machine_init(MachineClass * mc)118d9e8553bSMax Filippov static void xtensa_virt_machine_init(MachineClass *mc)
119d9e8553bSMax Filippov {
120d9e8553bSMax Filippov mc->desc = "virt machine (" XTENSA_DEFAULT_CPU_MODEL ")";
121d9e8553bSMax Filippov mc->init = xtensa_virt_init;
122d9e8553bSMax Filippov mc->max_cpus = 32;
123d9e8553bSMax Filippov mc->default_cpu_type = XTENSA_DEFAULT_CPU_TYPE;
12469720ff2SThomas Huth mc->default_nic = "virtio-net-pci";
125d9e8553bSMax Filippov }
126d9e8553bSMax Filippov
127d9e8553bSMax Filippov DEFINE_MACHINE("virt", xtensa_virt_machine_init)
128