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Searched refs:GCC_PCIE_0_PHY_NOCSR_COM_PHY_BCR (Results 1 – 14 of 14) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Dqcom,qdu1000-gcc.h152 #define GCC_PCIE_0_PHY_NOCSR_COM_PHY_BCR 7 macro
H A Dqcom,gcc-sm8450.h207 #define GCC_PCIE_0_PHY_NOCSR_COM_PHY_BCR 8 macro
H A Dqcom,sm8550-gcc.h191 #define GCC_PCIE_0_PHY_NOCSR_COM_PHY_BCR 7 macro
H A Dqcom,gcc-sm8250.h220 #define GCC_PCIE_0_PHY_NOCSR_COM_PHY_BCR 8 macro
H A Dqcom,gcc-sm8350.h222 #define GCC_PCIE_0_PHY_NOCSR_COM_PHY_BCR 8 macro
H A Dqcom,sa8775p-gcc.h273 #define GCC_PCIE_0_PHY_NOCSR_COM_PHY_BCR 11 macro
H A Dqcom,gcc-sc8280xp.h407 #define GCC_PCIE_0_PHY_NOCSR_COM_PHY_BCR 5 macro
/openbmc/linux/drivers/clk/qcom/
H A Dgcc-qdu1000.c2597 [GCC_PCIE_0_PHY_NOCSR_COM_PHY_BCR] = { 0x9e000 },
H A Dgcc-sm8450.c3179 [GCC_PCIE_0_PHY_NOCSR_COM_PHY_BCR] = { 0x7c028 },
H A Dgcc-sm8550.c3253 [GCC_PCIE_0_PHY_NOCSR_COM_PHY_BCR] = { 0x6c028 },
H A Dgcc-sm8250.c3544 [GCC_PCIE_0_PHY_NOCSR_COM_PHY_BCR] = { 0x6c028 },
H A Dgcc-sm8350.c3719 [GCC_PCIE_0_PHY_NOCSR_COM_PHY_BCR] = { 0x6c028 },
H A Dgcc-sa8775p.c4633 [GCC_PCIE_0_PHY_NOCSR_COM_PHY_BCR] = { 0xbf00c },
H A Dgcc-sc8280xp.c7379 [GCC_PCIE_0_PHY_NOCSR_COM_PHY_BCR] = { 0x6c028 },