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Searched refs:GCC_BLSP1_QUP5_BCR (Results 1 – 20 of 20) sorted by relevance

/openbmc/linux/include/dt-bindings/reset/
H A Dqcom,gcc-msm8974.h34 #define GCC_BLSP1_QUP5_BCR 25 macro
H A Dqcom,gcc-msm8916.h16 #define GCC_BLSP1_QUP5_BCR 7 macro
H A Dqcom,gcc-apq8084.h34 #define GCC_BLSP1_QUP5_BCR 25 macro
H A Dqcom,gcc-msm8939.h16 #define GCC_BLSP1_QUP5_BCR 7 macro
H A Dqcom,gcc-ipq6018.h18 #define GCC_BLSP1_QUP5_BCR 9 macro
H A Dqcom,ipq9574-gcc.h16 #define GCC_BLSP1_QUP5_BCR 7 macro
/openbmc/linux/include/dt-bindings/clock/
H A Dqcom,gcc-msm8909.h172 #define GCC_BLSP1_QUP5_BCR 6 macro
H A Dqcom,gcc-msm8998.h205 #define GCC_BLSP1_QUP5_BCR 4 macro
H A Dqcom,gcc-msm8996.h265 #define GCC_BLSP1_QUP5_BCR 25 macro
H A Dqcom,gcc-ipq8074.h247 #define GCC_BLSP1_QUP5_BCR 9 macro
/openbmc/linux/drivers/clk/qcom/
H A Dgcc-msm8909.c2640 [GCC_BLSP1_QUP5_BCR] = { 0x06018 },
H A Dgcc-msm8998.c3149 [GCC_BLSP1_QUP5_BCR] = { 0x21000 },
H A Dgcc-msm8974.c2765 [GCC_BLSP1_QUP5_BCR] = { 0x0840 },
H A Dgcc-apq8084.c3531 [GCC_BLSP1_QUP5_BCR] = { 0x0840 },
H A Dgcc-msm8916.c3320 [GCC_BLSP1_QUP5_BCR] = { 0x06018 },
H A Dgcc-msm8996.c3502 [GCC_BLSP1_QUP5_BCR] = { 0x21000 },
H A Dgcc-msm8939.c3878 [GCC_BLSP1_QUP5_BCR] = { 0x06018 },
H A Dgcc-ipq9574.c4158 [GCC_BLSP1_QUP5_BCR] = { 0x06000, 0 },
H A Dgcc-ipq6018.c4418 [GCC_BLSP1_QUP5_BCR] = { 0x06008, 0 },
H A Dgcc-ipq8074.c4546 [GCC_BLSP1_QUP5_BCR] = { 0x06008, 0 },