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Searched refs:Frequency (Results 1 – 25 of 25) sorted by relevance

/openbmc/u-boot/arch/arm/mach-imx/mx3/
H A DKconfig22 Frequency in Hz of the high frequency input clock. Typically
26 int "i.MX31 CLK32 Frequency"
29 Frequency in Hz of the low frequency input clock. Typically
/openbmc/openbmc-test-automation/systest/
H A Dproc_freq_check.robot25 ${actual_min_freq}= Get CPU Min Frequency
26 ${min_freq_designated_lower_limit}= Get CPU Min Frequency Limit
35 ${actual_max_freq}= Get CPU Max Frequency
36 ${max_freq_designated_limit}= Get CPU Max Frequency Limit
/openbmc/bmcweb/redfish-core/include/generated/enums/
H A Dcontrol.hpp14 Frequency, enumerator
56 {ControlType::Frequency, "Frequency"},
H A Dsensor.hpp56 Frequency, enumerator
140 {ReadingType::Frequency, "Frequency"},
/openbmc/openbmc/meta-openembedded/meta-multimedia/recipes-multimedia/dvb-apps/files/dvb-scan-table/dvb-c/
H A Dnl-Delta8 [Main Frequency]
H A Dnl-Ziggo10 [Main Frequency Ziggo]
/openbmc/phosphor-dbus-interfaces/yaml/xyz/openbmc_project/Led/
H A DREADME.md42 Frequency: 1000
45 Frequency: 1000
51 Frequency: 1000
55 Frequency: 1000
/openbmc/u-boot/doc/device-tree-bindings/mmc/
H A Dmsm_sdhci.txt14 - clock-frequency: Frequency of SD/eMMC bus (default 400 kHz)
/openbmc/u-boot/doc/device-tree-bindings/memory-controllers/
H A Dk3-am654-ddrss.txt32 - clock-frequency: Frequency at which DDR pll should be locked.
/openbmc/u-boot/board/renesas/MigoR/
H A Dlowlevel_init.S61 write32 FRQCR_A, FRQCR_D ! 0xA4150000 Frequency control register
/openbmc/u-boot/arch/powerpc/cpu/mpc8xx/
H A DKconfig33 int "CPU GCLK Frequency"
/openbmc/openbmc/meta-openembedded/meta-oe/recipes-devtools/abseil-cpp/abseil-cpp/
H A D0004-abseil-ppc-fixes.patch38 @@ -58,7 +58,7 @@ double UnscaledCycleClock::Frequency() {
/openbmc/docs/designs/
H A Dbmc-health-monitor.md103 "Frequency" : 1,
123 "Frequency" : 1,
138 Frequency : It is time in second when these data are collected in regular
/openbmc/openbmc/meta-openembedded/meta-python/recipes-devtools/python/python3-grpcio/
H A Dabseil-ppc-fixes.patch37 @@ -58,7 +58,7 @@ double UnscaledCycleClock::Frequency() {
/openbmc/openbmc/meta-openembedded/meta-oe/recipes-kernel/turbostat/
H A Dturbostat.bb8 SUMMARY = "Frequency and Idle power monitoring tools for Linux"
/openbmc/u-boot/drivers/clk/
H A DKconfig116 Support for the ICS8N3QV01 Quad-Frequency VCXO (Voltage-Controlled
/openbmc/openbmc-test-automation/lib/
H A Dos_utilities.robot171 Get CPU Min Frequency Limit
182 Get CPU Min Frequency
196 Get CPU Max Frequency Limit
207 Get CPU Max Frequency
/openbmc/u-boot/doc/
H A DREADME.m68k114 CONFIG_SYS_RFD -- defines the PLL Reduce Frequency Devider
/openbmc/u-boot/board/freescale/bsc9132qds/
H A DREADME71 Frequency Combinations Supported
/openbmc/u-boot/board/freescale/bsc9131rdb/
H A DREADME74 Frequency Combinations Supported
/openbmc/u-boot/board/freescale/p1010rdb/
H A DREADME.P1010RDB-PB89 Frequency combination support on P1010RDB-PB
/openbmc/u-boot/board/qualcomm/dragonboard820c/
H A Dreadme.txt140 S - Core 0 Frequency, 1228 MHz
204 S - DDR Frequency, 1017 MHz
/openbmc/bmcweb/docs/
H A DCOMMON_ERRORS.md421 sensorJson["ReadingType"] = "Frequency";
431 sensorJson["ReadingType"] = sensor::ReadingType::Frequency;
/openbmc/u-boot/arch/arm/mach-aspeed/ast2400/
H A Dplatform.S353 ldr r0, =0x1e6e2020 @ M-PLL (DDR SDRAM) Frequency
/openbmc/u-boot/arch/arm/mach-aspeed/ast2500/
H A Dplatform.S730 ldr r0, =0x1e6e2020 @ M-PLL (DDR SDRAM) Frequency