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Searched refs:EDAC_MOD_STR (Results 1 – 25 of 29) sorted by relevance

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/openbmc/linux/drivers/edac/
H A Damd76x_edac.c22 #define EDAC_MOD_STR "amd76x_edac" macro
263 mci->mod_name = EDAC_MOD_STR; in amd76x_probe1()
281 amd76x_pci = edac_pci_create_generic_ctl(&pdev->dev, EDAC_MOD_STR); in amd76x_probe1()
348 .name = EDAC_MOD_STR,
H A Dr82600_edac.c25 #define EDAC_MOD_STR "r82600_edac" macro
316 mci->mod_name = EDAC_MOD_STR; in r82600_probe1()
340 r82600_pci = edac_pci_create_generic_ctl(&pdev->dev, EDAC_MOD_STR); in r82600_probe1()
395 .name = EDAC_MOD_STR,
H A Di82860_edac.c19 #define EDAC_MOD_STR "i82860_edac" macro
216 mci->mod_name = EDAC_MOD_STR; in i82860_probe1()
233 i82860_pci = edac_pci_create_generic_ctl(&pdev->dev, EDAC_MOD_STR); in i82860_probe1()
300 .name = EDAC_MOD_STR,
H A Dmpc85xx_edac.c187 pci->mod_name = EDAC_MOD_STR; in mpc85xx_pci_err_probe()
269 pr_info(EDAC_MOD_STR " acquired irq %d for PCI Err\n", in mpc85xx_pci_err_probe()
291 pr_info(EDAC_MOD_STR " PCI err registered\n"); in mpc85xx_pci_err_probe()
545 edac_dev->mod_name = EDAC_MOD_STR; in mpc85xx_l2_err_probe()
572 pr_info(EDAC_MOD_STR " acquired irq %d for L2 Err\n", pdata->irq); in mpc85xx_l2_err_probe()
582 pr_info(EDAC_MOD_STR " L2 err registered\n"); in mpc85xx_l2_err_probe()
696 pr_warn(EDAC_MOD_STR "drivers fail to register\n"); in mpc85xx_mc_init()
H A Di82443bxgx_edac.c34 #define EDAC_MOD_STR "i82443bxgx_edac" macro
319 mci->mod_name = EDAC_MOD_STR; in i82443bxgx_edacmc_probe1()
331 i82443bxgx_pci = edac_pci_create_generic_ctl(&pdev->dev, EDAC_MOD_STR); in i82443bxgx_edacmc_probe1()
392 .name = EDAC_MOD_STR,
H A Di82875p_edac.c23 #define EDAC_MOD_STR "i82875p_edac" macro
423 mci->mod_name = EDAC_MOD_STR; in i82875p_probe1()
444 i82875p_pci = edac_pci_create_generic_ctl(&pdev->dev, EDAC_MOD_STR); in i82875p_probe1()
531 .name = EDAC_MOD_STR,
H A Di3000_edac.c19 #define EDAC_MOD_STR "i3000_edac" macro
374 mci->mod_name = EDAC_MOD_STR; in i3000_probe1()
432 i3000_pci = edac_pci_create_generic_ctl(&pdev->dev, EDAC_MOD_STR); in i3000_probe1()
498 .name = EDAC_MOD_STR,
H A De7xxx_edac.c35 #define EDAC_MOD_STR "e7xxx_edac" macro
458 mci->mod_name = EDAC_MOD_STR; in e7xxx_probe1()
504 e7xxx_pci = edac_pci_create_generic_ctl(&pdev->dev, EDAC_MOD_STR); in e7xxx_probe1()
576 .name = EDAC_MOD_STR,
H A Dfsl_ddr_edac.c30 #define EDAC_MOD_STR "fsl_ddr_edac" macro
549 mci->mod_name = EDAC_MOD_STR; in fsl_mc_err_probe()
597 pr_info(EDAC_MOD_STR " acquired irq %d for MC\n", in fsl_mc_err_probe()
603 pr_info(EDAC_MOD_STR " MC err registered\n"); in fsl_mc_err_probe()
H A Di3200_edac.c20 #define EDAC_MOD_STR "i3200_edac" macro
374 mci->mod_name = EDAC_MOD_STR; in i3200_probe1()
478 .name = EDAC_MOD_STR,
H A Dx38_edac.c21 #define EDAC_MOD_STR "x38_edac" macro
356 mci->mod_name = EDAC_MOD_STR; in x38_probe1()
456 .name = EDAC_MOD_STR,
H A Dmpc85xx_edac.h12 #define EDAC_MOD_STR "MPC85xx_edac" macro
H A Dskx_base.c16 #define EDAC_MOD_STR "skx_edac" macro
201 EDAC_MOD_STR); in skx_get_dimm_config()
660 if (owner && strncmp(owner, EDAC_MOD_STR, sizeof(EDAC_MOD_STR))) in skx_init()
711 "Skylake Socket", EDAC_MOD_STR, in skx_init()
H A Di82975x_edac.c19 #define EDAC_MOD_STR "i82975x_edac" macro
557 mci->mod_name = EDAC_MOD_STR; in i82975x_probe1()
638 .name = EDAC_MOD_STR,
H A Die31200_edac.c55 #define EDAC_MOD_STR "ie31200_edac" macro
453 mci->mod_name = EDAC_MOD_STR; in ie31200_probe1()
605 .name = EDAC_MOD_STR,
H A Digen6_edac.c32 #define EDAC_MOD_STR "igen6_edac" macro
1042 mci->mod_name = EDAC_MOD_STR; in igen6_register_mci()
1261 .name = EDAC_MOD_STR,
1278 if (owner && strncmp(owner, EDAC_MOD_STR, sizeof(EDAC_MOD_STR))) in igen6_init()
H A Di10nm_base.c17 #define EDAC_MOD_STR "i10nm_edac" macro
998 EDAC_MOD_STR); in i10nm_get_dimm_config()
1080 if (owner && strncmp(owner, EDAC_MOD_STR, sizeof(EDAC_MOD_STR))) in i10nm_init()
1148 "Intel_10nm Socket", EDAC_MOD_STR, in i10nm_init()
H A De752x_edac.c29 #define EDAC_MOD_STR "e752x_edac" macro
1303 mci->mod_name = EDAC_MOD_STR; in e752x_probe1()
1363 e752x_pci = edac_pci_create_generic_ctl(&pdev->dev, EDAC_MOD_STR); in e752x_probe1()
1436 .name = EDAC_MOD_STR,
H A Docteon_edac-l2c.c21 #define EDAC_MOD_STR "octeon-l2c" macro
H A Dxgene_edac.c21 #define EDAC_MOD_STR "xgene_edac" macro
405 mci->mod_name = EDAC_MOD_STR; in xgene_edac_mc_add()
933 edac_dev->mod_name = EDAC_MOD_STR; in xgene_edac_pmd_add()
1229 edac_dev->mod_name = EDAC_MOD_STR; in xgene_edac_l3_add()
1769 edac_dev->mod_name = EDAC_MOD_STR; in xgene_edac_soc_add()
2022 edac_printk(KERN_ERR, EDAC_MOD_STR, in xgene_edac_init()
H A Di7300_edac.c34 #define EDAC_MOD_STR "i7300_edac" macro
1106 i7300_pci = edac_pci_create_generic_ctl(&pdev->dev, EDAC_MOD_STR); in i7300_init_one()
H A Dpnd2_edac.c42 #define EDAC_MOD_STR "pnd2_edac" macro
1335 mci->mod_name = EDAC_MOD_STR; in pnd2_register_mci()
1535 if (owner && strncmp(owner, EDAC_MOD_STR, sizeof(EDAC_MOD_STR))) in pnd2_init()
H A Damd64_edac.h89 #define EDAC_MOD_STR "amd64_edac" macro
H A Damd64_edac.c3700 mci->mod_name = EDAC_MOD_STR; in dct_setup_mci_misc_attrs()
3722 mci->mod_name = EDAC_MOD_STR; in umc_setup_mci_misc_attrs()
3871 mci->mod_name = EDAC_MOD_STR; in gpu_setup_mci_misc_attrs()
4348 pci_ctl = edac_pci_create_generic_ctl(pci_ctl_dev, EDAC_MOD_STR); in setup_pci_device()
4378 if (owner && strncmp(owner, EDAC_MOD_STR, sizeof(EDAC_MOD_STR))) in amd64_edac_init()
4423 amd64_err("%s on 32-bit is unsupported. USE AT YOUR OWN RISK!\n", EDAC_MOD_STR); in amd64_edac_init()
H A Di5400_edac.c42 #define EDAC_MOD_STR "i5400_edac" macro
1338 i5400_pci = edac_pci_create_generic_ctl(&pdev->dev, EDAC_MOD_STR); in i5400_probe1()

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