/openbmc/u-boot/arch/arm/mach-davinci/ |
H A D | Kconfig | 76 int "PLLC0 PLL Post-Divider" 82 hex "PLLC0 Divider 1" 88 hex "PLLC0 Divider 2" 94 hex "PLLC0 Divider 3" 100 hex "PLLC0 Divider 4" 106 hex "PLLC0 Divider 5" 112 hex "PLLC0 Divider 6" 118 hex "PLLC0 Divider 7" 130 hex "PLLC1 Divider 2" 136 hex "PLLC1 Divider 2" [all …]
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/openbmc/linux/Documentation/devicetree/bindings/clock/ |
H A D | mvebu-corediv-clock.txt | 1 * Core Divider Clock bindings for Marvell MVEBU SoCs 12 - reg : must be the register address of Core Divider control register
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H A D | dove-divider-clock.txt | 18 - reg : shall be the register address of the Core PLL and Clock Divider 20 Core PLL and Clock Divider Control 1 register. Thus, it will have
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/openbmc/u-boot/doc/ |
H A D | README.AX25 | 10 - Hardware Divider
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H A D | README.m68k | 112 CONFIG_SYS_MFD -- defines the PLL Multiplication Factor Divider
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/openbmc/linux/drivers/gpu/drm/radeon/ |
H A D | smu7_fusion.h | 162 uint8_t Divider; member
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H A D | smu7_discrete.h | 258 uint8_t Divider; member
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H A D | kv_dpm.c | 759 pi->vce_level[i].Divider = (u8)dividers.post_div; in kv_populate_vce_table() 822 pi->samu_level[i].Divider = (u8)dividers.post_div; in kv_populate_samu_table() 881 pi->acp_level[i].Divider = (u8)dividers.post_div; in kv_populate_acp_table()
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H A D | ci_dpm.c | 2675 table->VceLevel[count].Divider = (u8)dividers.post_divider; in ci_populate_smc_vce_level() 2708 table->AcpLevel[count].Divider = (u8)dividers.post_divider; in ci_populate_smc_acp_level() 2740 table->SamuLevel[count].Divider = (u8)dividers.post_divider; in ci_populate_smc_samu_level()
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/openbmc/linux/drivers/gpu/drm/amd/pm/powerplay/inc/ |
H A D | smu7_fusion.h | 157 uint8_t Divider; member
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H A D | smu7_discrete.h | 258 uint8_t Divider; member
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H A D | smu71_discrete.h | 205 uint8_t Divider; member
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H A D | smu73_discrete.h | 171 uint8_t Divider; member
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H A D | smu72_discrete.h | 187 uint8_t Divider; member
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H A D | smu74_discrete.h | 198 uint8_t Divider; member
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H A D | smu75_discrete.h | 213 uint8_t Divider; member
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/openbmc/linux/Documentation/devicetree/bindings/iio/frequency/ |
H A D | adi,adf4350.yaml | 87 4: N-Divider output
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/openbmc/linux/drivers/video/fbdev/aty/ |
H A D | atyfb_base.c | 199 int Multiplier, Divider, Remainder; in ATIReduceRatio() local 202 Divider = *Denominator; in ATIReduceRatio() 204 while ((Remainder = Multiplier % Divider)) { in ATIReduceRatio() 205 Multiplier = Divider; in ATIReduceRatio() 206 Divider = Remainder; in ATIReduceRatio() 209 *Numerator /= Divider; in ATIReduceRatio() 210 *Denominator /= Divider; in ATIReduceRatio()
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/openbmc/linux/Documentation/hwmon/ |
H A D | vt1211.rst | 96 Voltage R1 R2 Divider Raw Value
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/openbmc/u-boot/arch/powerpc/cpu/mpc85xx/ |
H A D | Kconfig | 1534 int "Divider of platform clock" 1550 int "Divider of platform clock"
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/openbmc/linux/drivers/gpu/drm/amd/pm/legacy-dpm/ |
H A D | kv_dpm.c | 990 pi->vce_level[i].Divider = (u8)dividers.post_div; in kv_populate_vce_table() 1053 pi->samu_level[i].Divider = (u8)dividers.post_div; in kv_populate_samu_table() 1112 pi->acp_level[i].Divider = (u8)dividers.post_div; in kv_populate_acp_table()
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/openbmc/linux/drivers/gpu/drm/amd/pm/powerplay/smumgr/ |
H A D | fiji_smumgr.c | 1449 table->VceLevel[count].Divider = (uint8_t)dividers.pll_post_divider; in fiji_populate_smc_vce_level() 1485 table->AcpLevel[count].Divider = (uint8_t)dividers.pll_post_divider; in fiji_populate_smc_acp_level()
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H A D | polaris10_smumgr.c | 1407 table->VceLevel[count].Divider = (uint8_t)dividers.pll_post_divider; in polaris10_populate_smc_vce_level() 1456 table->SamuLevel[count].Divider = (uint8_t)dividers.pll_post_divider; in polaris10_populate_smc_samu_level()
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H A D | tonga_smumgr.c | 1405 table->VceLevel[count].Divider = (uint8_t)dividers.pll_post_divider; in tonga_populate_smc_vce_level() 1449 table->AcpLevel[count].Divider = (uint8_t)dividers.pll_post_divider; in tonga_populate_smc_acp_level()
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H A D | ci_smumgr.c | 1583 table->VceLevel[count].Divider = (uint8_t)dividers.pll_post_divider; in ci_populate_smc_vce_level() 1613 table->AcpLevel[count].Divider = (uint8_t)dividers.pll_post_divider; in ci_populate_smc_acp_level()
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