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Searched refs:DPPCLK (Results 1 – 18 of 18) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn301/
H A Ddcn301_dccg.h33 DCCG_SRII(DTO_PARAM, DPPCLK, 0),\
34 DCCG_SRII(DTO_PARAM, DPPCLK, 1),\
35 DCCG_SRII(DTO_PARAM, DPPCLK, 2),\
36 DCCG_SRII(DTO_PARAM, DPPCLK, 3),\
40 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_ENABLE, DPPCLK, 0, mask_sh),\
41 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_DB_EN, DPPCLK, 0, mask_sh),\
42 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_ENABLE, DPPCLK, 1, mask_sh),\
43 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_DB_EN, DPPCLK, 1, mask_sh),\
44 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_ENABLE, DPPCLK, 2, mask_sh),\
45 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_DB_EN, DPPCLK, 2, mask_sh),\
[all …]
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn20/
H A Ddcn20_dccg.h33 DCCG_SRII(DTO_PARAM, DPPCLK, 0),\
34 DCCG_SRII(DTO_PARAM, DPPCLK, 1),\
35 DCCG_SRII(DTO_PARAM, DPPCLK, 2),\
36 DCCG_SRII(DTO_PARAM, DPPCLK, 3),\
44 DCCG_SRII(DTO_PARAM, DPPCLK, 4),\
45 DCCG_SRII(DTO_PARAM, DPPCLK, 5),\
61 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_ENABLE, DPPCLK, 0, mask_sh),\
62 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_DB_EN, DPPCLK, 0, mask_sh),\
64 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_DB_EN, DPPCLK, 1, mask_sh),\
66 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_DB_EN, DPPCLK, 2, mask_sh),\
[all …]
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn303/
H A Ddcn303_dccg.h16 DCCG_SRII(DTO_PARAM, DPPCLK, 0),\
17 DCCG_SRII(DTO_PARAM, DPPCLK, 1),\
25 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_ENABLE, DPPCLK, 0, mask_sh),\
26 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_DB_EN, DPPCLK, 0, mask_sh),\
27 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_ENABLE, DPPCLK, 1, mask_sh),\
28 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_DB_EN, DPPCLK, 1, mask_sh),\
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn31/
H A Ddcn31_dccg.h33 DCCG_SRII(DTO_PARAM, DPPCLK, 0),\
34 DCCG_SRII(DTO_PARAM, DPPCLK, 1),\
35 DCCG_SRII(DTO_PARAM, DPPCLK, 2),\
36 DCCG_SRII(DTO_PARAM, DPPCLK, 3),\
71 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_ENABLE, DPPCLK, 0, mask_sh),\
72 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_DB_EN, DPPCLK, 0, mask_sh),\
73 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_ENABLE, DPPCLK, 1, mask_sh),\
74 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_DB_EN, DPPCLK, 1, mask_sh),\
75 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_ENABLE, DPPCLK, 2, mask_sh),\
76 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_DB_EN, DPPCLK, 2, mask_sh),\
[all …]
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn314/
H A Ddcn314_dccg.h38 DCCG_SRII(DTO_PARAM, DPPCLK, 0),\
39 DCCG_SRII(DTO_PARAM, DPPCLK, 1),\
40 DCCG_SRII(DTO_PARAM, DPPCLK, 2),\
41 DCCG_SRII(DTO_PARAM, DPPCLK, 3),\
81 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_DB_EN, DPPCLK, 0, mask_sh),\
82 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_DB_EN, DPPCLK, 1, mask_sh),\
83 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_DB_EN, DPPCLK, 2, mask_sh),\
84 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_DB_EN, DPPCLK, 3, mask_sh),\
172 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_ENABLE, DPPCLK, 0, mask_sh),\
173 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_ENABLE, DPPCLK, 1, mask_sh),\
[all …]
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn32/
H A Ddcn32_dccg.h35 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_ENABLE, DPPCLK, 0, mask_sh),\
36 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_DB_EN, DPPCLK, 0, mask_sh),\
37 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_ENABLE, DPPCLK, 1, mask_sh),\
38 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_DB_EN, DPPCLK, 1, mask_sh),\
39 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_ENABLE, DPPCLK, 2, mask_sh),\
40 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_DB_EN, DPPCLK, 2, mask_sh),\
41 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_ENABLE, DPPCLK, 3, mask_sh),\
42 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_DB_EN, DPPCLK, 3, mask_sh),\
H A Ddcn32_resource.h1287 SR(DPPCLK_DTO_CTRL), DCCG_SRII(DTO_PARAM, DPPCLK, 0), \
1288 DCCG_SRII(DTO_PARAM, DPPCLK, 1), DCCG_SRII(DTO_PARAM, DPPCLK, 2), \
1289 DCCG_SRII(DTO_PARAM, DPPCLK, 3), DCCG_SRII(CLOCK_CNTL, HDMICHARCLK, 0), \
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn302/
H A Ddcn302_dccg.h34 DCCG_SRII(DTO_PARAM, DPPCLK, 4)
38 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_ENABLE, DPPCLK, 4, mask_sh),\
39 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_DB_EN, DPPCLK, 4, mask_sh)
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/dcn30/
H A Ddisplay_mode_vba_30.c43 double DPPCLK; member
280 double DPPCLK,
319 double DPPCLK[],
368 double DPPCLK[],
415 double DPPCLK[],
918 myPipe->DPPCLK, in CalculatePrefetchSchedule()
2100 v->DPPCLK, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2431 myPipe.DPPCLK = v->DPPCLK[k]; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2766 v->DPPCLK, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2837 v->DPPCLK, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
[all …]
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/dcn21/
H A Ddisplay_mode_vba_21.c42 double DPPCLK; member
312 double DPPCLK[],
354 double DPPCLK[],
1764 locals->DPPCLK, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2140 myPipe.DPPCLK = locals->DPPCLK[k]; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2444 locals->DPPCLK, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2490 locals->DPPCLK, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
5269 double DPPCLK[], in CalculateWatermarksAndDRAMSpeedChangeSupport()
5538 double DPPCLK[], in CalculateDCFCLKDeepSleep() argument
5552 / DPPCLK[k]; in CalculateDCFCLKDeepSleep()
[all …]
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/dcn31/
H A Ddisplay_mode_vba_31.c63 double DPPCLK; member
274 double DPPCLK,
333 double DPPCLK[],
379 double DPPCLK[],
927 myPipe->DPPCLK,
2230 v->DPPCLK,
2606 myPipe.DPPCLK = v->DPPCLK[k];
2998 v->DPPCLK,
3415 double DPPCLK, argument
5775 double DPPCLK[], argument
[all …]
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/dcn314/
H A Ddisplay_mode_vba_314.c64 double DPPCLK; member
286 double DPPCLK,
345 double DPPCLK[],
391 double DPPCLK[],
948 myPipe->DPPCLK,
2251 v->DPPCLK,
2627 myPipe.DPPCLK = v->DPPCLK[k];
3019 v->DPPCLK,
3523 double DPPCLK, argument
5870 double DPPCLK[], argument
[all …]
/openbmc/linux/Documentation/gpu/amdgpu/display/
H A Ddc-glossary.rst38 * DPPCLK: DPP Clock
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/dcn20/
H A Ddisplay_mode_vba_20v2.c64 double DPPCLK,
93 double DPPCLK,
471 double DPPCLK, in CalculateDelayAfterScaler() argument
520 if (DPPCLK == 0.0 || DISPCLK == 0.0) in CalculateDelayAfterScaler()
543 double DPPCLK, in CalculatePrefetchSchedule() argument
615 150.0 / DPPCLK, in CalculatePrefetchSchedule()
1491 / mode_lib->vba.DPPCLK[k]; in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1505 / mode_lib->vba.DPPCLK[k]; in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2138 mode_lib->vba.DPPCLK[k], in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2384 / mode_lib->vba.DPPCLK[k]; in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
[all …]
H A Ddisplay_mode_vba_20.c58 double DPPCLK,
441 double DPPCLK, in CalculatePrefetchSchedule() argument
528 if (DPPCLK == 0.0 || DISPCLK == 0.0) in CalculatePrefetchSchedule()
552 150.0 / DPPCLK, in CalculatePrefetchSchedule()
1433 / mode_lib->vba.DPPCLK[k]; in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1457 / mode_lib->vba.DPPCLK[k]; in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1714 * mode_lib->vba.DPPCLK[k] in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1737 * mode_lib->vba.DPPCLK[k] in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2093 mode_lib->vba.DPPCLK[k], in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2350 / mode_lib->vba.DPPCLK[k]; in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
[all …]
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/
H A Ddisplay_mode_vba.c707 mode_lib->vba.DPPCLK[mode_lib->vba.NumberOfActivePlanes] = clks->dppclk_mhz; in fetch_pipe_params()
1110 mode_lib->vba.DPPCLK[k] = mode_lib->vba.cache_pipes[pipe_idx].clks_cfg.dppclk_mhz; in ModeSupportAndSystemConfiguration()
1112 mode_lib->vba.DPPCLK[k] = soc->clock_limits[mode_lib->vba.VoltageLevel].dppclk_mhz; in ModeSupportAndSystemConfiguration()
H A Ddisplay_mode_vba.h951 double DPPCLK[DC__NUM_DPP__MAX]; member
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/
H A Ddisplay_mode_vba_32.c138 &v->GlobalDPPCLK, v->DPPCLK); in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
141 v->DPPCLK_calculated[k] = v->DPPCLK[k]; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
326 mode_lib->vba.DPPCLK, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
763 …SleepPrefetchParametersWatermarksAndPerformanceCalculation.myPipe.Dppclk = mode_lib->vba.DPPCLK[k]; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1265 mode_lib->vba.DPPCLK, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()