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Searched refs:DMA_CHAN_TX_CONTROL (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/drivers/net/ethernet/stmicro/stmmac/
H A Ddwmac4_dma.c102 value = readl(ioaddr + DMA_CHAN_TX_CONTROL(dwmac4_addrs, chan)); in dwmac4_dma_init_tx_chan()
108 writel(value, ioaddr + DMA_CHAN_TX_CONTROL(dwmac4_addrs, chan)); in dwmac4_dma_init_tx_chan()
202 reg_space[DMA_CHAN_TX_CONTROL(default_addrs, channel) / 4] = in _dwmac4_dump_dma_regs()
203 readl(ioaddr + DMA_CHAN_TX_CONTROL(dwmac4_addrs, channel)); in _dwmac4_dump_dma_regs()
480 value = readl(ioaddr + DMA_CHAN_TX_CONTROL(dwmac4_addrs, chan)); in dwmac4_enable_tso()
482 ioaddr + DMA_CHAN_TX_CONTROL(dwmac4_addrs, chan)); in dwmac4_enable_tso()
485 value = readl(ioaddr + DMA_CHAN_TX_CONTROL(dwmac4_addrs, chan)); in dwmac4_enable_tso()
487 ioaddr + DMA_CHAN_TX_CONTROL(dwmac4_addrs, chan)); in dwmac4_enable_tso()
541 u32 value = readl(ioaddr + DMA_CHAN_TX_CONTROL(dwmac4_addrs, chan)); in dwmac4_enable_tbs()
548 writel(value, ioaddr + DMA_CHAN_TX_CONTROL(dwmac4_addrs, chan)); in dwmac4_enable_tbs()
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H A Ddwmac4_lib.c49 u32 value = readl(ioaddr + DMA_CHAN_TX_CONTROL(dwmac4_addrs, chan)); in dwmac4_dma_start_tx()
52 writel(value, ioaddr + DMA_CHAN_TX_CONTROL(dwmac4_addrs, chan)); in dwmac4_dma_start_tx()
64 u32 value = readl(ioaddr + DMA_CHAN_TX_CONTROL(dwmac4_addrs, chan)); in dwmac4_dma_stop_tx()
67 writel(value, ioaddr + DMA_CHAN_TX_CONTROL(dwmac4_addrs, chan)); in dwmac4_dma_stop_tx()
H A Ddwmac4_dma.h115 #define DMA_CHAN_TX_CONTROL(addrs, x) (dma_chanx_base_addr(addrs, x) + 0x4) macro