Searched refs:DISP_CC_MDSS_BYTE1_CLK (Results 1 – 19 of 19) sorted by relevance
| /openbmc/linux/include/dt-bindings/clock/ |
| H A D | qcom,dispcc-sdm845.h | 15 #define DISP_CC_MDSS_BYTE1_CLK 5 macro
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| H A D | qcom,dispcc-sm8150.h | 16 #define DISP_CC_MDSS_BYTE1_CLK 6 macro
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| H A D | qcom,dispcc-sm8250.h | 16 #define DISP_CC_MDSS_BYTE1_CLK 6 macro
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| H A D | qcom,dispcc-sm8350.h | 16 #define DISP_CC_MDSS_BYTE1_CLK 6 macro
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| H A D | qcom,dispcc-sc8280xp.h | 21 #define DISP_CC_MDSS_BYTE1_CLK 11 macro
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| H A D | qcom,sm8450-dispcc.h | 17 #define DISP_CC_MDSS_BYTE1_CLK 7 macro
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| H A D | qcom,sm8550-dispcc.h | 18 #define DISP_CC_MDSS_BYTE1_CLK 8 macro
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| /openbmc/linux/drivers/clk/qcom/ |
| H A D | dispcc-sdm845.c | 779 [DISP_CC_MDSS_BYTE1_CLK] = &disp_cc_mdss_byte1_clk.clkr,
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| H A D | dispcc-sm8250.c | 1167 [DISP_CC_MDSS_BYTE1_CLK] = &disp_cc_mdss_byte1_clk.clkr,
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| H A D | dispcc-sc8280xp.c | 2890 [DISP_CC_MDSS_BYTE1_CLK] = &disp0_cc_mdss_byte1_clk.clkr,
2972 [DISP_CC_MDSS_BYTE1_CLK] = &disp1_cc_mdss_byte1_clk.clkr,
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| H A D | dispcc-sm8550.c | 1635 [DISP_CC_MDSS_BYTE1_CLK] = &disp_cc_mdss_byte1_clk.clkr,
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| H A D | dispcc-sm8450.c | 1639 [DISP_CC_MDSS_BYTE1_CLK] = &disp_cc_mdss_byte1_clk.clkr,
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| /openbmc/linux/arch/arm64/boot/dts/qcom/ |
| H A D | sc8180x.dtsi | 2899 clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK>,
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| H A D | sm8350.dtsi | 2719 clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK>,
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| H A D | sm8150.dtsi | 3874 clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK>,
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| H A D | sm8550.dtsi | 2724 clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK>,
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| H A D | sm8450.dtsi | 3018 clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK>,
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| H A D | sdm845.dtsi | 4683 clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK>,
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| H A D | sm8250.dtsi | 4492 clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK>,
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