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Searched refs:DCACHE (Results 1 – 15 of 15) sorted by relevance

/openbmc/u-boot/arch/nds32/lib/
H A Dcache.c140 line_size = CACHE_LINE_SIZE(DCACHE); in dcache_wbinval_all()
141 end = line_size * CACHE_WAY(DCACHE) * CACHE_SET(DCACHE); in dcache_wbinval_all()
163 line_size = CACHE_LINE_SIZE(DCACHE); in flush_dcache_range()
178 line_size = CACHE_LINE_SIZE(DCACHE); in invalidate_dcache_range()
/openbmc/linux/arch/csky/include/uapi/asm/
H A Dcachectl.h10 #define DCACHE (1<<1) macro
11 #define BCACHE (ICACHE|DCACHE)
/openbmc/linux/arch/parisc/include/uapi/asm/
H A Dcachectl.h9 #define DCACHE (1<<1) /* writeback and flush data cache */ macro
10 #define BCACHE (ICACHE|DCACHE) /* flush both caches */
/openbmc/linux/arch/mips/include/uapi/asm/
H A Dcachectl.h16 #define DCACHE (1<<1) /* writeback and flush data cache */ macro
17 #define BCACHE (ICACHE|DCACHE) /* flush both caches */
/openbmc/u-boot/arch/mips/include/asm/
H A Dcachectl.h12 #define DCACHE (1<<1) /* writeback and flush data cache */ macro
13 #define BCACHE (ICACHE|DCACHE) /* flush both caches */
/openbmc/linux/arch/sh/include/uapi/asm/
H A Dcachectl.h17 #define DCACHE CACHEFLUSH_D_PURGE /* writeback and flush data cache */ macro
18 #define BCACHE (ICACHE|DCACHE) /* flush both caches */
/openbmc/u-boot/arch/arm/cpu/armv7m/
H A Dcache.c41 DCACHE, enumerator
119 if (type == DCACHE) in get_cline_size()
148 type = DCACHE; in action_cache_range()
/openbmc/linux/arch/arc/include/uapi/asm/
H A Dcachectl.h26 #define DCACHE CF_D_FLUSH macro
/openbmc/linux/arch/csky/mm/
H A Dsyscache.c16 case DCACHE: in SYSCALL_DEFINE3()
/openbmc/u-boot/arch/nds32/include/asm/
H A Dcache.h30 enum cache_t {ICACHE, DCACHE}; enumerator
/openbmc/qemu/util/
H A Dcacheflush.c311 cacheflush((void *)rw, len, DCACHE); in flush_idcache_range()
/openbmc/linux/arch/parisc/kernel/
H A Dcache.c948 if (cache & DCACHE) { in SYSCALL_DEFINE3()
/openbmc/linux/fs/ceph/
H A Ddir.c355 if (ceph_test_mount_opt(fsc, DCACHE) && in ceph_readdir()
810 ceph_test_mount_opt(fsc, DCACHE) && in ceph_lookup()
/openbmc/qemu/disas/
H A Dnios2.c1391 (MATCH_R2_I12(DCACHE) | SET_IW_F1X4I12_X (R2_DCACHE_##NAME))
/openbmc/u-boot/
H A DREADME4595 is this: Using DCACHE as initial RAM for Stack, etc, does not