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/openbmc/openbmc/poky/meta/conf/distro/include/
H A Ddistro_alias.inc12 DISTRO_PN_ALIAS:pn-alsa-state = "OE-Core"
25 DISTRO_PN_ALIAS:pn-builder = "OE-Core"
30 DISTRO_PN_ALIAS:pn-connman-conf = "OE-Core"
40 DISTRO_PN_ALIAS:pn-core-image-rt = "OE-Core"
73 DISTRO_PN_ALIAS:pn-formfactor = "OE-Core"
106 DISTRO_PN_ALIAS:pn-hello-mod = "OE-Core"
122 DISTRO_PN_ALIAS:pn-keymaps = "OE-Core"
192 DISTRO_PN_ALIAS:pn-makedevs = "OE-Core"
266 DISTRO_PN_ALIAS:pn-piglit = "OE-Core"
337 DISTRO_PN_ALIAS:pn-usbinit = "OE-Core"
[all …]
/openbmc/openbmc/poky/meta/lib/patchtest/selftest/files/
H A DTestMbox.test_commit_message_presence.fail4 Subject: [PATCH] README.OE-Core.md: add foo
8 README.OE-Core.md | 1 +
11 diff --git a/README.OE-Core.md b/README.OE-Core.md
13 --- a/README.OE-Core.md
14 +++ b/README.OE-Core.md
17 OpenEmbedded-Core
H A DTestMbox.test_commit_message_presence.pass4 Subject: [PATCH] README.OE-Core.md: add foo
10 README.OE-Core.md | 1 +
13 diff --git a/README.OE-Core.md b/README.OE-Core.md
15 --- a/README.OE-Core.md
16 +++ b/README.OE-Core.md
19 OpenEmbedded-Core
/openbmc/linux/Documentation/hwmon/
H A Dcoretemp.rst5 * All Intel Core family
70 22nm Core i5/i7 Processors
81 32nm Core i3/i5/i7 Processors
88 32nm Core i7 Extreme Processors
103 45nm Xeon Processors 5400 Quad-Core
109 45nm Xeon Processors 5200 Dual-Core
152 45nm Core i3/i5/i7 Processors
172 65nm Core Duo Processors
177 65nm Core Solo Processors
181 65nm Xeon Processors 5000 Quad-Core
[all …]
H A Dk8temp.rst36 temp1_input temperature of Core 0 and "place" 0
37 temp2_input temperature of Core 0 and "place" 1
38 temp3_input temperature of Core 1 and "place" 0
39 temp4_input temperature of Core 1 and "place" 1
/openbmc/u-boot/board/armltd/integrator/
H A DREADME69 Core modules marked ** are also no longer available.
73 ap926ejs_config Integrator Core Module for ARM926EJ-STM
74 ap946es_config Integrator Core Module for ARM946E-STM
76 cp926ejs_config Integrator Core Module for ARM926EJ-STM
77 cp946es_config Integrator Core Module for ARM946E-STM
78 cp1136_config Integrator Core Module ARM1136JF-S TM
84 ap966_config Integrator Core Module for ARM966E-S TM
85 ap922_config Integrator Core Module for ARM922T TM with ETM
92 cp966_config Integrator Core Module for ARM966E-S TM
93 cp922_config Integrator Core Module for ARM922T TM with ETM
[all …]
/openbmc/u-boot/arch/arm/mach-integrator/
H A DKconfig25 bool "Core Module for ARM720T"
29 bool "Core Module for ARM920T"
33 bool "Core Module for ARM926EJ-STM"
37 bool "Core Module for ARM946E-STM"
41 bool "Core Module for ARM1136JF-STM"
/openbmc/linux/Documentation/arch/x86/
H A Dtopology.rst101 Core-related topology information in the kernel:
158 1) Single Package, Single Core::
162 2) Single Package, Dual Core
186 -> [Compute Unit Core 1] -> Linux CPU 1
187 -> [Compute Unit 1] -> [Compute Unit Core 0] -> Linux CPU 2
188 -> [Compute Unit Core 1] -> Linux CPU 3
190 4) Dual Package, Dual Core
227 -> [Compute Unit Core 1] -> Linux CPU 1
229 -> [Compute Unit Core 1] -> Linux CPU 3
232 -> [Compute Unit Core 1] -> Linux CPU 5
[all …]
/openbmc/linux/Documentation/devicetree/bindings/mips/loongson/
H A Ddevices.yaml20 - description: Classic Loongson64 Quad Core + LS7A
24 - description: Classic Loongson64 Quad Core + RS780E
28 - description: Classic Loongson64 Octa Core + RS780E
32 - description: Generic Loongson64 Quad Core + LS7A
36 - description: Virtual Loongson64 Quad Core + VirtIO
/openbmc/openbmc/meta-openembedded/meta-oe/recipes-support/libeigen/libeigen/
H A D0001-Default-eigen_packet_wrapper-constructor.patch17 …berrypi4-webos-linux-gnueabi/fuse-core/0.4.2-1-r0/recipe-sysroot/usr/include/eigen3/Eigen/Core:214,
22 …-gnueabi/fuse-core/0.4.2-1-r0/recipe-sysroot/usr/include/eigen3/Eigen/src/Core/arch/NEON/PacketMat…
26 …berrypi4-webos-linux-gnueabi/fuse-core/0.4.2-1-r0/recipe-sysroot/usr/include/eigen3/Eigen/Core:172,
31 …-gnueabi/fuse-core/0.4.2-1-r0/recipe-sysroot/usr/include/eigen3/Eigen/src/Core/GenericPacketMath.h…
34 …berrypi4-webos-linux-gnueabi/fuse-core/0.4.2-1-r0/recipe-sysroot/usr/include/eigen3/Eigen/Core:214,
43 …berrypi4-webos-linux-gnueabi/fuse-core/0.4.2-1-r0/recipe-sysroot/usr/include/eigen3/Eigen/Core:172,
48 …-gnueabi/fuse-core/0.4.2-1-r0/recipe-sysroot/usr/include/eigen3/Eigen/src/Core/GenericPacketMath.h…
54 Eigen/src/Core/GenericPacketMath.h | 2 +-
57 diff --git a/Eigen/src/Core/GenericPacketMath.h b/Eigen/src/Core/GenericPacketMath.h
59 --- a/Eigen/src/Core/GenericPacketMath.h
[all …]
/openbmc/linux/drivers/usb/dwc3/
H A DKconfig4 tristate "DesignWare USB3 DRD Core Support"
11 USB controller based on the DesignWare USB3 IP Core.
82 If you're using the DesignWare Core IP with a PCIe (but not HAPS
90 If you're using the DesignWare Core IP with a Synopsys PCIe HAPS
126 STMicroelectronics SoCs with one DesignWare Core USB3 IP
137 Some Qualcomm SoCs use DesignWare Core IP for USB2/3
149 NXP iMX8M Plus SoC use DesignWare Core IP for USB2/3
158 Support Xilinx SoCs with DesignWare Core USB3 IP.
167 Support TI's AM62 platforms with DesignWare Core USB3 IP.
168 The Designware Core USB3 IP is programmed to operate in
[all …]
/openbmc/u-boot/board/freescale/t208xrdb/
H A Dt2080_sd_rcw.cfg5 #SerDes=0x66_0x16, Core=1533MHz, DDR=1600MT/s
12 #SerDes=0x66_0x15, Core:1800MHz, DDR:1600MT/s
15 #SerDes=0x66_0x15, Core:1800MHz, DDR:1867MT/s
H A Dt2080_nand_rcw.cfg5 #SerDes=0x66_0x16, Core=1533MHz, DDR=1600MT/s
12 #SerDes=0x66_0x15, Core:1800MHz, DDR:1600MT/s
15 #SerDes=0x66_0x15, Core:1800MHz, DDR:1867MT/s
H A Dt2080_spi_rcw.cfg5 #SerDes=0x66_0x16, Core=1533MHz, DDR=1600MT/s
12 #SerDes=0x66_0x15, Core:1800MHz, DDR:1600MT/s
15 #SerDes=0x66_0x15, Core:1800MHz, DDR:1867MT/s
/openbmc/linux/Documentation/arch/arm/
H A Dmarvell.rst31 Core:
79 Core:
111 Core:
132 Core:
151 Core:
160 Core:
177 Core:
187 Core:
202 Core:
237 Core:
[all …]
/openbmc/linux/Documentation/gpu/amdgpu/display/
H A Dindex.rst4 drm/amd/display - Display Core (DC)
8 reason, our Display Core Driver is divided into two pieces:
10 1. **Display Core (DC)** contains the OS-agnostic components. Things like
/openbmc/u-boot/board/freescale/t208xqds/
H A Dt2080_sd_rcw.cfg5 #SerDes=0x66_0x16, Core=1533MHz, DDR=2133MT/s
12 #SerDes=0x66_0x15, Core=1800MHz, DDR=1867MT/s
H A Dt2080_spi_rcw.cfg5 #SerDes=0x66_0x16, Core=1533MHz, DDR=2133MT/s
12 #SerDes=0x66_0x15, Core=1800MHz, DDR=1867MT/s
H A Dt2080_nand_rcw.cfg5 #SerDes=0x66_0x16, Core=1533MHz, DDR=2133MT/s
12 #SerDes=0x66_0x15, Core=1800MHz, DDR=1867MT/s
/openbmc/linux/Documentation/networking/caif/
H A Dlinux_caif.rst32 * CAIF Core Protocol Implementation
47 ! +------+ <- CAIF Core Protocol
49 ! ! Core !
63 CAIF Core Protocol Layer
66 CAIF Core layer implements the CAIF protocol as defined by ST-Ericsson.
75 The Core CAIF implementation contains:
180 CAIF Core protocol. The IP Interface and CAIF socket have an instance of
181 'struct cflayer', just like the CAIF Core protocol stack.
/openbmc/linux/Documentation/devicetree/bindings/soc/qcom/
H A Dqcom,apr-services.yaml22 3 = DSP Core Service
29 10 = Core voice stream.
30 11 = Core voice processor.
/openbmc/linux/Documentation/devicetree/bindings/display/ti/
H A Dti,omap-dss.txt11 The OMAP Display Subsystem (DSS) hardware consists of DSS Core, DISPC module and
12 a number of encoder modules. All DSS versions contain DSS Core and DISPC, but
15 The DSS Core is the parent of the other DSS modules, and manages clock routing,
27 The DSS Core and the encoders have video port outputs. The structure of the
90 DSS Core --(MIPI DPI)--> TFP410 --(DVI)--> DVI Connector
/openbmc/linux/Documentation/devicetree/bindings/arm/stm32/
H A Dstm32.yaml126 - description: Engicam i.Core STM32MP1 SoM based Boards
129 - engicam,icore-stm32mp1-ctouch2 # STM32MP1 Engicam i.Core STM32MP1 C.TOUCH 2.0
130 … - engicam,icore-stm32mp1-ctouch2-of10 # STM32MP1 Engicam i.Core STM32MP1 C.TOUCH 2.0 10.1" OF
131 … - engicam,icore-stm32mp1-edimm2.2 # STM32MP1 Engicam i.Core STM32MP1 EDIMM2.2 Starter Kit
132 - const: engicam,icore-stm32mp1 # STM32MP1 Engicam i.Core STM32MP1 SoM
/openbmc/openbmc/poky/meta-selftest/recipes-extended/hello-rs/hello-rs/
H A D0001-Greet-OE-Core.patch4 Subject: [PATCH] Greet "OE-Core"
21 + let greeting = greet(Some("OE-Core"));
/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dmvebu-corediv-clock.txt1 * Core Divider Clock bindings for Marvell MVEBU SoCs
12 - reg : must be the register address of Core Divider control register

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