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Searched refs:CSI (Results 1 – 14 of 14) sorted by relevance

/openbmc/u-boot/arch/arm/mach-rockchip/rk3399/
H A DKconfig28 * HDMI, eDP, MIPI-DSI, MIPI-DSI/CSI and MIPI-CSI
/openbmc/u-boot/board/theobroma-systems/puma_rk3399/
H A DREADME20 * Camera: 2x CSI (one on the edge connector, one on the Q7 specified CSI ZIF)
/openbmc/u-boot/arch/arm/mach-sunxi/
H A Ddram_sunxi_dw.c125 MBUS_CONF( CSI, true, HIGHEST, 0, 256, 128, 32); in mctl_set_master_priority_h3()
150 MBUS_CONF( CSI, true, HIGH, 0, 256, 128, 0); in mctl_set_master_priority_a64()
180 MBUS_CONF( CSI, true, HIGHEST, 0, 150, 120, 100); in mctl_set_master_priority_h5()
208 MBUS_CONF( CSI, true, HIGHEST, 0, 150, 120, 100); in mctl_set_master_priority_r40()
/openbmc/u-boot/drivers/clk/
H A Dclk_stm32h7.c443 CSI, enumerator
453 [CSI] = "clk-csi",
510 pllsrc = stm32_get_rate(regs, CSI); in stm32_get_PLL1_rate()
654 sysclk = stm32_get_rate(regs, CSI); in stm32_clk_get_rate()
/openbmc/u-boot/arch/arm/mach-rockchip/rk3368/
H A DKconfig39 with integrated CVBS (TP2825) / MIPI DSI / CSI / LVDS
/openbmc/u-boot/arch/arm/dts/
H A Dsun4i-a10-gemei-g9.dts67 * 2x cameras via CSI
H A Dsun8i-r16-bananapi-m2m.dts141 /* This is the i2c bus exposed on the CSI connector to control the sensor */
/openbmc/u-boot/arch/arm/mach-tegra/tegra114/
H A Dclock.c291 NONE(CSI),
/openbmc/u-boot/arch/arm/mach-tegra/tegra124/
H A Dpinmux.c320 MIPIPADCTRL_GRP(DSI_B, CSI, DSI_B),
H A Dclock.c391 NONE(CSI),
/openbmc/u-boot/arch/arm/mach-tegra/tegra30/
H A Dclock.c291 NONE(CSI),
/openbmc/u-boot/drivers/power/
H A DKconfig164 On A83T / H8 boards aldo1 is used for MIPI CSI, DSI, HDMI, EFUSE, and
/openbmc/u-boot/arch/arm/mach-tegra/tegra210/
H A Dclock.c422 NONE(CSI),
/openbmc/qemu/ui/
H A Dtrace-events7 console_putchar_csi(int esc_param0, int esc_param1, int ch, int nb_esc_params) "escape sequence CSI