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Searched refs:CPUPPCState (Results 1 – 25 of 41) sorted by relevance

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/openbmc/qemu/target/ppc/
H A Dtimebase_helper.c29 target_ulong helper_load_tbl(CPUPPCState *env) in helper_load_tbl()
34 target_ulong helper_load_tbu(CPUPPCState *env) in helper_load_tbu()
39 target_ulong helper_load_atbl(CPUPPCState *env) in helper_load_atbl()
44 target_ulong helper_load_atbu(CPUPPCState *env) in helper_load_atbu()
49 target_ulong helper_load_vtb(CPUPPCState *env) in helper_load_vtb()
55 target_ulong helper_load_purr(CPUPPCState *env) in helper_load_purr()
60 void helper_store_purr(CPUPPCState *env, target_ulong val) in helper_store_purr()
71 CPUPPCState *cenv = &POWERPC_CPU(ccs)->env; in helper_store_purr()
78 void helper_store_tbl(CPUPPCState *env, target_ulong val) in helper_store_tbl()
89 CPUPPCState *cenv = &POWERPC_CPU(ccs)->env; in helper_store_tbl()
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H A Dmisc_helper.c34 void helper_load_dump_spr(CPUPPCState *env, uint32_t sprn) in helper_load_dump_spr()
40 void helper_store_dump_spr(CPUPPCState *env, uint32_t sprn) in helper_store_dump_spr()
46 void helper_spr_core_write_generic(CPUPPCState *env, uint32_t sprn, in helper_spr_core_write_generic()
58 CPUPPCState *cenv = &POWERPC_CPU(ccs)->env; in helper_spr_core_write_generic()
63 void helper_spr_write_CTRL(CPUPPCState *env, uint32_t sprn, in helper_spr_write_CTRL()
80 CPUPPCState *cenv = &POWERPC_CPU(ccs)->env; in helper_spr_write_CTRL()
89 static void raise_hv_fu_exception(CPUPPCState *env, uint32_t bit, in raise_hv_fu_exception()
101 static void raise_fu_exception(CPUPPCState *env, uint32_t bit, in raise_fu_exception()
115 void helper_hfscr_facility_check(CPUPPCState *env, uint32_t bit, in helper_hfscr_facility_check()
126 void helper_fscr_facility_check(CPUPPCState *env, uint32_t bit, in helper_fscr_facility_check()
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H A Dhelper_regs.h25 void hreg_swap_gpr_tgpr(CPUPPCState *env);
26 void hreg_compute_hflags(CPUPPCState *env);
27 void hreg_update_pmu_hflags(CPUPPCState *env);
29 int hreg_store_msr(CPUPPCState *env, target_ulong value, int alter_hv);
32 static inline void check_tlb_flush(CPUPPCState *env, bool global) { } in check_tlb_flush()
34 void check_tlb_flush(CPUPPCState *env, bool global);
H A Dcpu.c31 target_ulong cpu_read_xer(const CPUPPCState *env) in cpu_read_xer()
43 void cpu_write_xer(CPUPPCState *env, target_ulong xer) in cpu_write_xer()
56 void ppc_store_vscr(CPUPPCState *env, uint32_t vscr) in ppc_store_vscr()
66 uint32_t ppc_get_vscr(CPUPPCState *env) in ppc_get_vscr()
72 void ppc_set_cr(CPUPPCState *env, uint64_t cr) in ppc_set_cr()
80 uint64_t ppc_get_cr(const CPUPPCState *env) in ppc_get_cr()
90 void ppc_store_msr(CPUPPCState *env, target_ulong value) in ppc_store_msr()
99 CPUPPCState *env = &cpu->env; in ppc_store_lpcr()
109 void ppc_update_ciabr(CPUPPCState *env) in ppc_update_ciabr()
128 void ppc_store_ciabr(CPUPPCState *env, target_ulong val) in ppc_store_ciabr()
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H A Dpower8-pmu.c24 static bool pmc_has_overflow_enabled(CPUPPCState *env, int sprn) in pmc_has_overflow_enabled()
37 static void pmu_update_summaries(CPUPPCState *env) in pmu_update_summaries()
84 static void hreg_bhrb_filter_update(CPUPPCState *env) in hreg_bhrb_filter_update()
115 void pmu_mmcr01a_updated(CPUPPCState *env) in pmu_mmcr01a_updated()
136 static bool pmu_increment_insns(CPUPPCState *env, uint32_t num_insns) in pmu_increment_insns()
200 static void pmu_update_cycles(CPUPPCState *env) in pmu_update_cycles()
224 static QEMUTimer *get_cyc_overflow_timer(CPUPPCState *env, int sprn) in get_cyc_overflow_timer()
229 static void pmc_update_overflow_timer(CPUPPCState *env, int sprn) in pmc_update_overflow_timer()
262 static void pmu_update_overflow_timers(CPUPPCState *env) in pmu_update_overflow_timers()
275 static void pmu_delete_timers(CPUPPCState *env) in pmu_delete_timers()
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H A Dpower8-pmu.h27 void cpu_ppc_pmu_init(CPUPPCState *env);
28 void pmu_mmcr01a_updated(CPUPPCState *env);
30 static inline void cpu_ppc_pmu_init(CPUPPCState *env) { } in cpu_ppc_pmu_init()
31 static inline void pmu_mmcr01a_updated(CPUPPCState *env) { } in pmu_mmcr01a_updated()
H A Dmmu_helper.c47 static inline void ppc6xx_tlb_invalidate_all(CPUPPCState *env) in ppc6xx_tlb_invalidate_all()
59 static inline void ppc6xx_tlb_invalidate_virt2(CPUPPCState *env, in ppc6xx_tlb_invalidate_virt2()
85 static inline void ppc6xx_tlb_invalidate_virt(CPUPPCState *env, in ppc6xx_tlb_invalidate_virt()
91 static void ppc6xx_tlb_store(CPUPPCState *env, target_ulong EPN, int way, in ppc6xx_tlb_store()
112 static inline void ppc4xx_tlb_invalidate_all(CPUPPCState *env) in ppc4xx_tlb_invalidate_all()
124 static void booke206_flush_tlb(CPUPPCState *env, int flags, in booke206_flush_tlb()
149 static inline void do_invalidate_BAT(CPUPPCState *env, target_ulong BATu, in do_invalidate_BAT()
174 static inline void dump_store_bat(CPUPPCState *env, char ID, int ul, int nr, in dump_store_bat()
182 void helper_store_ibatu(CPUPPCState *env, uint32_t nr, target_ulong value) in helper_store_ibatu()
209 void helper_store_ibatl(CPUPPCState *env, uint32_t nr, target_ulong value) in helper_store_ibatl()
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H A Dmmu-booke.h6 int ppcemb_tlb_search(CPUPPCState *env, target_ulong address, uint32_t pid);
7 int mmu40x_get_physical_address(CPUPPCState *env, hwaddr *raddr, int *prot,
10 hwaddr booke206_tlb_to_page_size(CPUPPCState *env, ppcmas_tlb_t *tlb);
11 int ppcmas_tlb_check(CPUPPCState *env, ppcmas_tlb_t *tlb, hwaddr *raddrp,
H A Dcpu.h306 typedef struct CPUArchState CPUPPCState; typedef
1439 int (*check_pow)(CPUPPCState *env);
1442 int (*check_attn)(CPUPPCState *env);
1523 CPUPPCState env;
1582 void (*init_proc)(CPUPPCState *env);
1583 int (*check_pow)(CPUPPCState *env);
1584 int (*check_attn)(CPUPPCState *env);
1587 uint64_t (*load_sprd)(CPUPPCState *env);
1588 void (*store_sprd)(CPUPPCState *env, uint64_t val);
1651 void ppc_maybe_interrupt(CPUPPCState *env);
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H A Dmem_helper.c34 static inline bool needs_byteswap(const CPUPPCState *env) in needs_byteswap()
46 static inline target_ulong addr_add(CPUPPCState *env, target_ulong addr, in addr_add()
59 static void *probe_contiguous(CPUPPCState *env, target_ulong addr, uint32_t nb, in probe_contiguous()
85 void helper_lmw(CPUPPCState *env, target_ulong addr, uint32_t reg) in helper_lmw()
107 void helper_stmw(CPUPPCState *env, target_ulong addr, uint32_t reg) in helper_stmw()
129 static void do_lsw(CPUPPCState *env, target_ulong addr, uint32_t nb, in do_lsw()
189 void helper_lsw(CPUPPCState *env, target_ulong addr, in helper_lsw()
201 void helper_lswx(CPUPPCState *env, target_ulong addr, uint32_t reg, in helper_lswx()
217 void helper_stsw(CPUPPCState *env, target_ulong addr, uint32_t nb, in helper_stsw()
275 static void dcbz_common(CPUPPCState *env, target_ulong addr, in dcbz_common()
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H A Dgdbstub.c84 void ppc_maybe_bswap_register(CPUPPCState *env, uint8_t *mem_buf, int len) in ppc_maybe_bswap_register()
111 CPUPPCState *env = cpu_env(cs); in ppc_cpu_gdb_read_register()
154 CPUPPCState *env = cpu_env(cs); in ppc_cpu_gdb_read_register_apple()
207 CPUPPCState *env = cpu_env(cs); in ppc_cpu_gdb_write_register()
253 CPUPPCState *env = cpu_env(cs); in ppc_cpu_gdb_write_register_apple()
303 CPUPPCState *env = &cpu->env; in gdb_gen_spr_feature()
352 static int gdb_find_spr_idx(CPUPPCState *env, int n) in gdb_find_spr_idx()
369 CPUPPCState *env = &cpu->env; in gdb_get_spr_reg()
412 CPUPPCState *env = &cpu->env; in gdb_set_spr_reg()
443 CPUPPCState *env = &cpu->env; in gdb_get_float_reg()
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H A Dmmu-hash64.c55 CPUPPCState *env = &cpu->env; in slb_lookup()
87 CPUPPCState *env = &cpu->env; in dump_slb()
106 void helper_SLBIA(CPUPPCState *env, uint32_t ih) in helper_SLBIA()
179 void helper_SLBIAG(CPUPPCState *env, target_ulong rs, uint32_t l) in helper_SLBIAG()
205 static void __helper_slbie(CPUPPCState *env, target_ulong addr, in __helper_slbie()
229 void helper_SLBIE(CPUPPCState *env, target_ulong addr) in helper_SLBIE()
234 void helper_SLBIEG(CPUPPCState *env, target_ulong addr) in helper_SLBIEG()
243 CPUPPCState *env = &cpu->env; in ppc_store_slb()
296 CPUPPCState *env = &cpu->env; in ppc_load_slb_esid()
311 CPUPPCState *env = &cpu->env; in ppc_load_slb_vsid()
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H A Dppc-qmp-cmds.c96 { "fpscr", offsetof(CPUPPCState, fpscr) },
98 { "nip|pc", offsetof(CPUPPCState, nip) },
99 { "lr", offsetof(CPUPPCState, lr) },
100 { "ctr", offsetof(CPUPPCState, ctr) },
105 { "msr", offsetof(CPUPPCState, msr) },
141 CPUPPCState *env = cpu_env(cs); in target_get_monitor_def()
H A Dmmu-booke.c28 static bool ppcemb_tlb_check(CPUPPCState *env, ppcemb_tlb_t *tlb, in ppcemb_tlb_check()
56 int ppcemb_tlb_search(CPUPPCState *env, target_ulong address, uint32_t pid) in ppcemb_tlb_search()
71 int mmu40x_get_physical_address(CPUPPCState *env, hwaddr *raddr, int *prot, in mmu40x_get_physical_address()
134 static bool mmubooke_check_pid(CPUPPCState *env, ppcemb_tlb_t *tlb, in mmubooke_check_pid()
157 static int mmubooke_check_tlb(CPUPPCState *env, ppcemb_tlb_t *tlb, in mmubooke_check_tlb()
188 static int mmubooke_get_physical_address(CPUPPCState *env, hwaddr *raddr, in mmubooke_get_physical_address()
210 hwaddr booke206_tlb_to_page_size(CPUPPCState *env, ppcmas_tlb_t *tlb) in booke206_tlb_to_page_size()
220 int ppcmas_tlb_check(CPUPPCState *env, ppcmas_tlb_t *tlb, hwaddr *raddrp, in ppcmas_tlb_check()
286 static bool mmubooke206_get_as(CPUPPCState *env, in mmubooke206_get_as()
309 static int mmubooke206_check_tlb(CPUPPCState *env, ppcmas_tlb_t *tlb, in mmubooke206_check_tlb()
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H A Dcpu_init.c63 static inline void vscr_init(CPUPPCState *env, uint32_t val) in vscr_init()
70 static void register_745_sprs(CPUPPCState *env) in register_745_sprs()
107 static void register_755_sprs(CPUPPCState *env) in register_755_sprs()
122 static void register_7xx_sprs(CPUPPCState *env) in register_7xx_sprs()
228 static void register_amr_sprs(CPUPPCState *env) in register_amr_sprs()
260 static void register_iamr_sprs(CPUPPCState *env) in register_iamr_sprs()
273 static void register_604_sprs(CPUPPCState *env) in register_604_sprs()
328 static void register_604e_sprs(CPUPPCState *env) in register_604e_sprs()
352 static void register_603_sprs(CPUPPCState *env) in register_603_sprs()
376 static void register_e300_sprs(CPUPPCState *env) in register_e300_sprs()
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H A Ddfp_helper.c63 CPUPPCState *env;
148 ppc_fprp_t *b, CPUPPCState *env) in dfp_prepare_decimal64()
172 ppc_fprp_t *b, CPUPPCState *env) in dfp_prepare_decimal128()
430 void helper_##op(CPUPPCState *env, ppc_fprp_t *t, ppc_fprp_t *a, \
496 uint32_t helper_##op(CPUPPCState *env, ppc_fprp_t *a, ppc_fprp_t *b) \
528 uint32_t helper_##op(CPUPPCState *env, ppc_fprp_t *a, uint32_t dcm) \
556 uint32_t helper_##op(CPUPPCState *env, ppc_fprp_t *a, uint32_t dcm) \
611 uint32_t helper_##op(CPUPPCState *env, ppc_fprp_t *a, ppc_fprp_t *b) \
643 uint32_t helper_##op(CPUPPCState *env, ppc_fprp_t *a, ppc_fprp_t *b) \
680 uint32_t helper_##op(CPUPPCState *env, uint32_t a, ppc_fprp_t *b) \
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H A Dmmu_common.c40 void ppc_store_sdr1(CPUPPCState *env, target_ulong value) in ppc_store_sdr1()
69 int ppc6xx_tlb_getnum(CPUPPCState *env, target_ulong eaddr, in ppc6xx_tlb_getnum()
88 static int ppc6xx_tlb_check(CPUPPCState *env, hwaddr *raddr, int *prot, in ppc6xx_tlb_check()
190 static int get_bat_6xx_tlb(CPUPPCState *env, hwaddr *raddr, int *prot, in get_bat_6xx_tlb()
261 static int mmu6xx_get_physical_address(CPUPPCState *env, hwaddr *raddr, in mmu6xx_get_physical_address()
352 static void mmubooke_dump_mmu(CPUPPCState *env) in mmubooke_dump_mmu()
397 static void mmubooke206_dump_one_tlb(CPUPPCState *env, int tlbn, int offset, in mmubooke206_dump_one_tlb()
445 static void mmubooke206_dump_mmu(CPUPPCState *env) in mmubooke206_dump_mmu()
469 static void mmu6xx_dump_BATs(CPUPPCState *env, int type) in mmu6xx_dump_BATs()
500 static void mmu6xx_dump_mmu(CPUPPCState *env) in mmu6xx_dump_mmu()
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H A Dinternal.h224 void helper_compute_fprf_float16(CPUPPCState *env, float16 arg);
225 void helper_compute_fprf_float32(CPUPPCState *env, float32 arg);
226 void helper_compute_fprf_float128(CPUPPCState *env, float128 arg);
253 int ppc6xx_tlb_getnum(CPUPPCState *env, target_ulong eaddr,
294 G_NORETURN void powerpc_checkstop(CPUPPCState *env, const char *reason);
H A Dspr_common.h43 void _spr_register(CPUPPCState *env, int num, const char *name,
219 void register_low_BATs(CPUPPCState *env);
220 void register_high_BATs(CPUPPCState *env);
221 void register_sdr1_sprs(CPUPPCState *env);
222 void register_thrm_sprs(CPUPPCState *env);
223 void register_usprgh_sprs(CPUPPCState *env);
224 void register_non_embedded_sprs(CPUPPCState *env);
225 void register_6xx_7xx_soft_tlb(CPUPPCState *env, int nb_tlbs, int nb_ways);
H A Dmmu-radix64.c64 static bool ppc_radix64_get_fully_qualified_addr(const CPUPPCState *env, in ppc_radix64_get_fully_qualified_addr()
119 CPUPPCState *env = &cpu->env; in ppc_radix64_raise_segi()
148 CPUPPCState *env = &cpu->env; in ppc_radix64_raise_si()
179 CPUPPCState *env = &cpu->env; in ppc_radix64_raise_hsi()
224 const CPUPPCState *env = &cpu->env; in ppc_radix64_get_prot_amr()
237 CPUPPCState *env = &cpu->env; in ppc_radix64_check_prot()
410 CPUPPCState *env = &cpu->env; in validate_pate()
520 CPUPPCState *env = &cpu->env; in ppc_radix64_process_scoped_xlate()
697 CPUPPCState *env = &cpu->env; in ppc_radix64_xlate_impl()
H A Dint_helper.c38 static inline void helper_update_ov_legacy(CPUPPCState *env, int ov) in helper_update_ov_legacy()
47 target_ulong helper_DIVWEU(CPUPPCState *env, target_ulong ra, target_ulong rb, in helper_DIVWEU()
74 target_ulong helper_DIVWE(CPUPPCState *env, target_ulong ra, target_ulong rb, in helper_DIVWE()
104 uint64_t helper_DIVDEU(CPUPPCState *env, uint64_t ra, uint64_t rb, uint32_t oe) in helper_DIVDEU()
123 uint64_t helper_DIVDE(CPUPPCState *env, uint64_t rau, uint64_t rbu, uint32_t oe) in helper_DIVDE()
238 target_ulong helper_sraw(CPUPPCState *env, target_ulong value, in helper_sraw()
264 target_ulong helper_srad(CPUPPCState *env, target_ulong value, in helper_srad()
480 void helper_mtvscr(CPUPPCState *env, uint32_t vscr) in SATCVT()
485 uint32_t helper_mfvscr(CPUPPCState *env) in helper_mfvscr()
490 static inline void set_vscr_sat(CPUPPCState *env) in set_vscr_sat()
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/openbmc/qemu/hw/ppc/
H A Dppc440.h16 void ppc4xx_l2sram_init(CPUPPCState *env);
17 void ppc4xx_cpr_init(CPUPPCState *env);
18 void ppc4xx_sdr_init(CPUPPCState *env);
19 void ppc4xx_ahb_init(CPUPPCState *env);
20 void ppc4xx_dma_init(CPUPPCState *env, int dcr_base);
H A Dspapr_cpu_core.c32 CPUPPCState *env = &cpu->env; in spapr_reset_vcpu()
94 CPUPPCState *env = &cpu->env; in spapr_cpu_set_entry_state()
204 CPUPPCState *env = &cpu->env; in spapr_unrealize_vcpu()
269 CPUPPCState *env = &cpu->env; in spapr_realize_vcpu()
307 CPUPPCState *env; in spapr_create_vcpu()
/openbmc/qemu/linux-user/ppc/
H A Dtarget_cpu.h22 static inline void cpu_clone_regs_child(CPUPPCState *env, target_ulong newsp, in cpu_clone_regs_child()
31 static inline void cpu_clone_regs_parent(CPUPPCState *env, unsigned flags) in cpu_clone_regs_parent()
35 static inline void cpu_set_tls(CPUPPCState *env, target_ulong newtls) in cpu_set_tls()
55 static inline abi_ulong get_sp_from_cpustate(CPUPPCState *state) in get_sp_from_cpustate()
H A Dsignal.c224 CPUPPCState *env, in get_sigframe()
243 static void save_user_regs(CPUPPCState *env, struct target_mcontext *frame) in save_user_regs()
326 static void restore_user_regs(CPUPPCState *env, in restore_user_regs()
427 target_sigset_t *set, CPUPPCState *env) in setup_frame()
482 target_sigset_t *set, CPUPPCState *env) in setup_rt_frame()
574 long do_sigreturn(CPUPPCState *env) in do_sigreturn()
610 static int do_setcontext(struct target_ucontext *ucp, CPUPPCState *env, int sig) in do_setcontext()
639 long do_rt_sigreturn(CPUPPCState *env) in do_rt_sigreturn()

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