Lines Matching refs:CPUPPCState

300 typedef struct CPUArchState CPUPPCState;  typedef
1367 int (*check_pow)(CPUPPCState *env);
1370 int (*check_attn)(CPUPPCState *env);
1451 CPUPPCState env;
1509 void (*init_proc)(CPUPPCState *env);
1510 int (*check_pow)(CPUPPCState *env);
1511 int (*check_attn)(CPUPPCState *env);
1574 void ppc_maybe_interrupt(CPUPPCState *env);
1586 void ppc_store_sdr1(CPUPPCState *env, target_ulong value);
1588 void ppc_update_ciabr(CPUPPCState *env);
1589 void ppc_store_ciabr(CPUPPCState *env, target_ulong value);
1590 void ppc_update_daw0(CPUPPCState *env);
1591 void ppc_store_dawr0(CPUPPCState *env, target_ulong value);
1592 void ppc_store_dawrx0(CPUPPCState *env, uint32_t value);
1594 void ppc_store_msr(CPUPPCState *env, target_ulong value);
1599 uint64_t cpu_ppc_load_tbl(CPUPPCState *env);
1600 uint32_t cpu_ppc_load_tbu(CPUPPCState *env);
1601 void cpu_ppc_store_tbu(CPUPPCState *env, uint32_t value);
1602 void cpu_ppc_store_tbl(CPUPPCState *env, uint32_t value);
1603 uint64_t cpu_ppc_load_atbl(CPUPPCState *env);
1604 uint32_t cpu_ppc_load_atbu(CPUPPCState *env);
1605 void cpu_ppc_store_atbl(CPUPPCState *env, uint32_t value);
1606 void cpu_ppc_store_atbu(CPUPPCState *env, uint32_t value);
1607 void cpu_ppc_increase_tb_by_offset(CPUPPCState *env, int64_t offset);
1608 void cpu_ppc_decrease_tb_by_offset(CPUPPCState *env, int64_t offset);
1609 uint64_t cpu_ppc_load_vtb(CPUPPCState *env);
1610 void cpu_ppc_store_vtb(CPUPPCState *env, uint64_t value);
1611 bool ppc_decr_clear_on_delivery(CPUPPCState *env);
1612 target_ulong cpu_ppc_load_decr(CPUPPCState *env);
1613 void cpu_ppc_store_decr(CPUPPCState *env, target_ulong value);
1614 target_ulong cpu_ppc_load_hdecr(CPUPPCState *env);
1615 void cpu_ppc_store_hdecr(CPUPPCState *env, target_ulong value);
1616 void cpu_ppc_store_tbu40(CPUPPCState *env, uint64_t value);
1617 uint64_t cpu_ppc_load_purr(CPUPPCState *env);
1618 void cpu_ppc_store_purr(CPUPPCState *env, uint64_t value);
1620 target_ulong load_40x_pit(CPUPPCState *env);
1621 void store_40x_pit(CPUPPCState *env, target_ulong val);
1622 void store_40x_dbcr0(CPUPPCState *env, uint32_t val);
1623 void store_40x_sler(CPUPPCState *env, uint32_t val);
1624 void store_40x_tcr(CPUPPCState *env, target_ulong val);
1625 void store_40x_tsr(CPUPPCState *env, target_ulong val);
1626 void store_booke_tcr(CPUPPCState *env, target_ulong val);
1627 void store_booke_tsr(CPUPPCState *env, target_ulong val);
1628 void ppc_tlb_invalidate_all(CPUPPCState *env);
1629 void ppc_tlb_invalidate_one(CPUPPCState *env, target_ulong addr);
1634 void ppc_store_fpscr(CPUPPCState *env, target_ulong val);
1635 void helper_hfscr_facility_check(CPUPPCState *env, uint32_t bit,
1638 static inline uint64_t ppc_dump_gpr(CPUPPCState *env, int gprn) in ppc_dump_gpr()
1663 static inline int ppc_env_mmu_index(CPUPPCState *env, bool ifetch) in ppc_env_mmu_index()
2731 target_ulong cpu_read_xer(const CPUPPCState *env);
2732 void cpu_write_xer(CPUPPCState *env, target_ulong xer);
2741 void cpu_get_tb_cpu_state(CPUPPCState *env, vaddr *pc,
2744 static inline void cpu_get_tb_cpu_state(CPUPPCState *env, vaddr *pc, in cpu_get_tb_cpu_state()
2753 G_NORETURN void raise_exception(CPUPPCState *env, uint32_t exception);
2754 G_NORETURN void raise_exception_ra(CPUPPCState *env, uint32_t exception,
2756 G_NORETURN void raise_exception_err(CPUPPCState *env, uint32_t exception,
2758 G_NORETURN void raise_exception_err_ra(CPUPPCState *env, uint32_t exception,
2763 void raise_ebb_perfm_exception(CPUPPCState *env);
2767 static inline int booke206_tlbm_id(CPUPPCState *env, ppcmas_tlb_t *tlbm) in booke206_tlbm_id()
2775 static inline int booke206_tlb_size(CPUPPCState *env, int tlbn) in booke206_tlb_size()
2782 static inline int booke206_tlb_ways(CPUPPCState *env, int tlbn) in booke206_tlb_ways()
2789 static inline int booke206_tlbm_to_tlbn(CPUPPCState *env, ppcmas_tlb_t *tlbm) in booke206_tlbm_to_tlbn()
2806 static inline int booke206_tlbm_to_way(CPUPPCState *env, ppcmas_tlb_t *tlb) in booke206_tlbm_to_way()
2813 static inline ppcmas_tlb_t *booke206_get_tlbm(CPUPPCState *env, const int tlbn, in booke206_get_tlbm()
2840 static inline uint32_t booke206_tlbnps(CPUPPCState *env, const int tlbn) in booke206_tlbnps()
2860 static inline void booke206_fixed_size_tlbn(CPUPPCState *env, const int tlbn, in booke206_fixed_size_tlbn()
2888 static inline bool msr_is_64bit(CPUPPCState *env, target_ulong msr) in msr_is_64bit()
2936 return offsetof(CPUPPCState, vsr[i].VsrD(high ? 0 : 1)); in vsr64_offset()
2941 return offsetof(CPUPPCState, vsr[i].u64[0]); in vsr_full_offset()
2954 static inline uint64_t *cpu_fpr_ptr(CPUPPCState *env, int i) in cpu_fpr_ptr()
2959 static inline uint64_t *cpu_vsrl_ptr(CPUPPCState *env, int i) in cpu_vsrl_ptr()
2974 static inline ppc_avr_t *cpu_avr_ptr(CPUPPCState *env, int i) in cpu_avr_ptr()
2990 CPUPPCState *env = &cpu->env; in ppc_interrupts_little_endian()
3010 void dump_mmu(CPUPPCState *env);
3012 void ppc_maybe_bswap_register(CPUPPCState *env, uint8_t *mem_buf, int len);
3013 void ppc_store_vscr(CPUPPCState *env, uint32_t vscr);
3014 uint32_t ppc_get_vscr(CPUPPCState *env);
3015 void ppc_set_cr(CPUPPCState *env, uint64_t cr);
3016 uint64_t ppc_get_cr(const CPUPPCState *env);
3020 static inline int check_pow_none(CPUPPCState *env) in check_pow_none()
3025 static inline int check_pow_nocheck(CPUPPCState *env) in check_pow_nocheck()
3031 static inline int check_attn_none(CPUPPCState *env) in check_attn_none()