/openbmc/linux/arch/mips/include/asm/ |
H A D | addrspace.h | 73 #define CKSEG0ADDR(a) (CPHYSADDR(a) | CKSEG0) 74 #define CKSEG1ADDR(a) (CPHYSADDR(a) | CKSEG1) 75 #define CKSEG2ADDR(a) (CPHYSADDR(a) | CKSEG2) 80 #define CKSEG0ADDR(a) (CPHYSADDR(a) | KSEG0) 81 #define CKSEG1ADDR(a) (CPHYSADDR(a) | KSEG1) 82 #define CKSEG2ADDR(a) (CPHYSADDR(a) | KSEG2) 83 #define CKSEG3ADDR(a) (CPHYSADDR(a) | KSEG3) 88 #define KSEG0ADDR(a) (CPHYSADDR(a) | KSEG0) 89 #define KSEG1ADDR(a) (CPHYSADDR(a) | KSEG1) 90 #define KSEG2ADDR(a) (CPHYSADDR(a) | KSEG2) [all …]
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H A D | page.h | 179 return x < CKSEG0 ? XPHYSADDR(x) : CPHYSADDR(x); in ___pa() 189 return CPHYSADDR(x); in ___pa()
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/openbmc/u-boot/arch/mips/include/asm/ |
H A D | addrspace.h | 70 #define CKSEG0ADDR(a) (CPHYSADDR(a) | CKSEG0) 71 #define CKSEG1ADDR(a) (CPHYSADDR(a) | CKSEG1) 72 #define CKSEG2ADDR(a) (CPHYSADDR(a) | CKSEG2) 77 #define CKSEG0ADDR(a) (CPHYSADDR(a) | KSEG0) 78 #define CKSEG1ADDR(a) (CPHYSADDR(a) | KSEG1) 79 #define CKSEG2ADDR(a) (CPHYSADDR(a) | KSEG2) 80 #define CKSEG3ADDR(a) (CPHYSADDR(a) | KSEG3) 85 #define KSEG0ADDR(a) (CPHYSADDR(a) | KSEG0) 86 #define KSEG1ADDR(a) (CPHYSADDR(a) | KSEG1) 87 #define KSEG2ADDR(a) (CPHYSADDR(a) | KSEG2) [all …]
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/openbmc/linux/arch/mips/include/asm/mach-jazz/ |
H A D | floppy.h | 67 vdma_set_addr(JAZZ_FLOPPY_DMA, vdma_phys2log(CPHYSADDR((unsigned long)a))); in fd_set_dma_addr() 111 vdma_alloc(CPHYSADDR(mem), size); /* XXX error checking */ in fd_dma_mem_alloc() 118 vdma_free(vdma_phys2log(CPHYSADDR(addr))); in fd_dma_mem_free()
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/openbmc/linux/include/linux/ |
H A D | lantiq.h | 14 #ifndef CPHYSADDR 15 #define CPHYSADDR(a) 0 macro
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/openbmc/linux/arch/mips/alchemy/devboards/ |
H A D | bcsr.c | 33 bcsr1_phys = KSEG1ADDR(CPHYSADDR(bcsr1_phys)); in bcsr_init() 34 bcsr2_phys = KSEG1ADDR(CPHYSADDR(bcsr2_phys)); in bcsr_init()
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/openbmc/linux/arch/mips/include/asm/mach-dec/ |
H A D | mc146818rtc.h | 20 #define RTC_PORT(x) CPHYSADDR((long)dec_rtc_base)
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/openbmc/linux/arch/mips/sibyte/common/ |
H A D | cfe.c | 89 initrd_pstart = CPHYSADDR(initrd_start); in prom_meminit() 90 initrd_pend = CPHYSADDR(initrd_end); in prom_meminit()
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/openbmc/linux/arch/mips/ar7/ |
H A D | memory.c | 24 u32 *kernel_end = (u32 *)KSEG1ADDR(CPHYSADDR((u32)&_end)); in memsize()
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/openbmc/linux/arch/mips/ralink/ |
H A D | prom.c | 50 if (CPHYSADDR(p) && *p) { in prom_init_cmdline()
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H A D | mt7621.c | 68 if (CPHYSADDR(dm + size) >= MT7621_LOWMEM_MAX_SIZE) in mt7621_addr_wraparound_test()
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/openbmc/linux/arch/mips/lantiq/xway/ |
H A D | vmmc.c | 36 (void *) CPHYSADDR(dma_alloc_coherent(&pdev->dev, CP1_SIZE, in vmmc_probe()
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/openbmc/linux/arch/mips/dec/ |
H A D | tc.c | 45 tbus->slot_base = CPHYSADDR((long)rex_slot_address(0)); in tc_bus_get_info()
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H A D | kn01-berr.c | 106 address = CPHYSADDR(vaddr); in dec_kn01_be_backend()
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/openbmc/u-boot/drivers/net/ |
H A D | mt7628-eth.c | 395 priv->tx_ring[idx].txd1 = CPHYSADDR(packet); in mt7628_eth_send() 480 priv->rx_ring[i].rxd1 = CPHYSADDR(priv->rx_buf[i]); in mt7628_eth_start() 501 writel(CPHYSADDR(&priv->rx_ring[0]), base + RX_BASE_PTR0); in mt7628_eth_start() 502 writel(CPHYSADDR((u32)&priv->tx_ring[0]), base + TX_BASE_PTR0); in mt7628_eth_start()
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/openbmc/linux/arch/mips/lantiq/ |
H A D | prom.c | 60 if (CPHYSADDR(p) && *p) { in prom_init_cmdline()
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/openbmc/linux/arch/mips/bcm47xx/ |
H A D | prom.c | 77 off = CPHYSADDR((unsigned long)prom_init); in prom_init_mem()
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/openbmc/linux/arch/mips/include/asm/mach-au1x00/ |
H A D | au1000_dma.h | 242 __raw_writel(CPHYSADDR(chan->fifo_addr), chan->io + DMA_PERIPHERAL_ADDR); in init_dma() 307 __raw_writel(CPHYSADDR(a), chan->io + DMA_PERIPHERAL_ADDR); in set_dma_fifo_addr()
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/openbmc/linux/drivers/gpio/ |
H A D | gpio-mm-lantiq.c | 96 ltq_ebu_w32(CPHYSADDR(chip->mmchip.regs) | 0x1, LTQ_EBU_ADDRSEL1); in ltq_mm_save_regs()
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/openbmc/u-boot/drivers/mtd/ |
H A D | pic32_flash.c | 143 sect_start = CPHYSADDR(info->start[sect]); in flash_erase() 197 writel(CPHYSADDR(dest), &nvm_regs_p->addr.raw); in write_word()
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/openbmc/linux/arch/mips/alchemy/common/ |
H A D | platform.c | 37 alchemy_uart_enable(CPHYSADDR(port->membase)); in alchemy_8250_pm() 42 alchemy_uart_disable(CPHYSADDR(port->membase)); in alchemy_8250_pm()
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/openbmc/linux/arch/mips/mm/ |
H A D | page.c | 632 u64 to_phys = CPHYSADDR((unsigned long)page); in clear_page() 657 u64 from_phys = CPHYSADDR((unsigned long)from); in copy_page() 658 u64 to_phys = CPHYSADDR((unsigned long)to); in copy_page()
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/openbmc/linux/arch/mips/pci/ |
H A D | pci-malta.c | 100 GT_WRITE(GT_PCI0_CFGDATA_OFS, CPHYSADDR(MIPS_GT_BASE)); in mips_pcibios_init()
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/openbmc/linux/drivers/mtd/nand/raw/ |
H A D | xway_nand.c | 209 ltq_ebu_w32(CPHYSADDR(data->nandaddr) in xway_nand_probe()
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/openbmc/linux/drivers/net/ethernet/ |
H A D | lantiq_etop.c | 118 CPHYSADDR(ch->skb[ch->dma.desc]->data); in ltq_etop_alloc_skb() 496 byte_offset = CPHYSADDR(skb->data) % (priv->tx_burst_len * 4); in ltq_etop_tx()
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