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Searched refs:CONFIG_SYS_LBC_SDRAM_BASE (Results 1 – 25 of 26) sorted by relevance

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/openbmc/u-boot/board/sbc8548/
H A Dtlb.c62 #ifdef CONFIG_SYS_LBC_SDRAM_BASE
67 SET_TLB_ENTRY(1, CONFIG_SYS_LBC_SDRAM_BASE, CONFIG_SYS_LBC_SDRAM_BASE,
75 SET_TLB_ENTRY(1, CONFIG_SYS_LBC_SDRAM_BASE + 0x4000000,
76 CONFIG_SYS_LBC_SDRAM_BASE + 0x4000000,
H A Dlaw.c45 #ifdef CONFIG_SYS_LBC_SDRAM_BASE
47 SET_LAW(CONFIG_SYS_LBC_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_LBC),
H A Dsbc8548.c125 uint *sdram_addr = (uint *)CONFIG_SYS_LBC_SDRAM_BASE; in lbc_sdram_init()
126 uint *sdram_addr2 = (uint *)(CONFIG_SYS_LBC_SDRAM_BASE + size/2); in lbc_sdram_init()
/openbmc/u-boot/include/configs/
H A Dsbc8349.h116 #define CONFIG_SYS_LBC_SDRAM_BASE 0xF0000000 /* Localbus SDRAM */ macro
202 #define CONFIG_SYS_BR2_PRELIM (CONFIG_SYS_LBC_SDRAM_BASE \
207 #define CONFIG_SYS_LBLAWBAR2_PRELIM CONFIG_SYS_LBC_SDRAM_BASE
553 #define CONFIG_SYS_IBAT6L (CONFIG_SYS_LBC_SDRAM_BASE \
557 #define CONFIG_SYS_IBAT6U (CONFIG_SYS_LBC_SDRAM_BASE \
H A DMPC8548CDS.h178 #define CONFIG_SYS_LBC_SDRAM_BASE 0xf0000000 /* Localbus SDRAM */ macro
182 #define CONFIG_SYS_LBC_SDRAM_BASE_PHYS CONFIG_SYS_LBC_SDRAM_BASE
H A DMPC8349EMDS.h140 #define CONFIG_SYS_LBC_SDRAM_BASE 0xF0000000 /* Localbus SDRAM */ macro
246 #define CONFIG_SYS_BR2_PRELIM (CONFIG_SYS_LBC_SDRAM_BASE \
251 #define CONFIG_SYS_LBLAWBAR2_PRELIM CONFIG_SYS_LBC_SDRAM_BASE
H A DMPC8555CDS.h119 #define CONFIG_SYS_LBC_SDRAM_BASE 0xf0000000 /* Localbus SDRAM */ macro
H A DMPC8541CDS.h121 #define CONFIG_SYS_LBC_SDRAM_BASE 0xf0000000 /* Localbus SDRAM */ macro
H A DMPC8540ADS.h95 #define CONFIG_SYS_LBC_SDRAM_BASE 0xf0000000 /* Localbus SDRAM */ macro
H A DMPC8568MDS.h128 #define CONFIG_SYS_LBC_SDRAM_BASE 0xf0000000 /* Localbus SDRAM */ macro
H A DMPC8560ADS.h94 #define CONFIG_SYS_LBC_SDRAM_BASE 0xf0000000 /* Localbus SDRAM */ macro
H A Dsbc8548.h266 #define CONFIG_SYS_LBC_SDRAM_BASE 0xf0000000 /* Localbus SDRAM */ macro
/openbmc/u-boot/board/freescale/mpc8568mds/
H A Dtlb.c68 SET_TLB_ENTRY(1, CONFIG_SYS_LBC_SDRAM_BASE, CONFIG_SYS_LBC_SDRAM_BASE,
H A Dlaw.c37 SET_LAW(CONFIG_SYS_LBC_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_LBC),
H A Dmpc8568mds.c161 uint *sdram_addr = (uint *)CONFIG_SYS_LBC_SDRAM_BASE; in lbc_sdram_init()
/openbmc/u-boot/board/freescale/mpc8555cds/
H A Dtlb.c82 SET_TLB_ENTRY(1, CONFIG_SYS_LBC_SDRAM_BASE, CONFIG_SYS_LBC_SDRAM_BASE,
H A Dlaw.c38 SET_LAW(CONFIG_SYS_LBC_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_LBC),
H A Dmpc8555cds.c281 uint *sdram_addr = (uint *)CONFIG_SYS_LBC_SDRAM_BASE; in lbc_sdram_init()
/openbmc/u-boot/board/freescale/mpc8541cds/
H A Dtlb.c82 SET_TLB_ENTRY(1, CONFIG_SYS_LBC_SDRAM_BASE, CONFIG_SYS_LBC_SDRAM_BASE,
H A Dlaw.c38 SET_LAW(CONFIG_SYS_LBC_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_LBC),
H A Dmpc8541cds.c283 uint *sdram_addr = (uint *)CONFIG_SYS_LBC_SDRAM_BASE; in lbc_sdram_init()
/openbmc/u-boot/board/freescale/mpc8548cds/
H A Dtlb.c48 SET_TLB_ENTRY(1, CONFIG_SYS_LBC_SDRAM_BASE,
H A Dmpc8548cds.c101 uint *sdram_addr = (uint *)CONFIG_SYS_LBC_SDRAM_BASE; in lbc_sdram_init()
/openbmc/u-boot/board/sbc8349/
H A Dsbc8349.c149 uint *sdram_addr = (uint *)CONFIG_SYS_LBC_SDRAM_BASE; in sdram_init()
/openbmc/u-boot/board/freescale/mpc8349emds/
H A Dmpc8349emds.c185 uint *sdram_addr = (uint *)CONFIG_SYS_LBC_SDRAM_BASE; in sdram_init()

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