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Searched refs:CONFIG_SYS_CLK (Results 1 – 25 of 27) sorted by relevance

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/openbmc/u-boot/arch/m68k/cpu/mcf52x2/
H A Dcpu.c130 cpu_model, prn, strmhz(buf, CONFIG_SYS_CLK)); in print_cpuinfo()
134 pin, prn, strmhz(buf, CONFIG_SYS_CLK)); in print_cpuinfo()
282 strmhz(buf, CONFIG_SYS_CLK)); in print_cpuinfo()
368 strmhz(buf, CONFIG_SYS_CLK)); in print_cpuinfo()
392 strmhz(buf, CONFIG_SYS_CLK)); in print_cpuinfo()
H A Dspeed.c68 gd->cpu_clk = CONFIG_SYS_CLK; in get_clocks()
/openbmc/u-boot/include/configs/
H A Damcore.h42 #define CONFIG_SYS_CLK 45000000 macro
43 #define CONFIG_SYS_CPU_CLK (CONFIG_SYS_CLK * 2)
H A DM53017EVB.h99 #define CONFIG_SYS_CLK 80000000 macro
100 #define CONFIG_SYS_CPU_CLK CONFIG_SYS_CLK * 3
H A Dastro_mcf5373l.h75 #define CONFIG_SYS_CLK 80000000 macro
76 #define CONFIG_SYS_CPU_CLK (CONFIG_SYS_CLK * 3)
H A DM5235EVB.h94 #define CONFIG_SYS_CLK 75000000 macro
95 #define CONFIG_SYS_CPU_CLK CONFIG_SYS_CLK * 2
H A DM5373EVB.h91 #define CONFIG_SYS_CLK 80000000 macro
92 #define CONFIG_SYS_CPU_CLK CONFIG_SYS_CLK * 3
H A DM5329EVB.h91 #define CONFIG_SYS_CLK 80000000 macro
92 #define CONFIG_SYS_CPU_CLK CONFIG_SYS_CLK * 3
H A DM5253DEMO.h101 # define CONFIG_SYS_CLK 140000000 macro
104 # define CONFIG_SYS_CLK 70000000 macro
H A DM5475EVB.h128 #define CONFIG_SYS_CLK CONFIG_SYS_BUSCLK macro
129 #define CONFIG_SYS_CPU_CLK CONFIG_SYS_CLK * 2
H A DM5485EVB.h116 #define CONFIG_SYS_CLK CONFIG_SYS_BUSCLK macro
117 #define CONFIG_SYS_CPU_CLK CONFIG_SYS_CLK * 2
H A DM5249EVB.h52 #define CONFIG_SYS_CLK 132025600 /* MCF5249 can run at 140MHz */ macro
H A DM5282EVB.h91 #define CONFIG_SYS_CLK 64000000 macro
H A DM5275EVB.h108 #define CONFIG_SYS_CLK 150000000 macro
H A DM5208EVBE.h82 #define CONFIG_SYS_CLK 166666666 /* CPU Core Clock */ macro
H A DM5272C3.h97 #define CONFIG_SYS_CLK 66000000 macro
H A Dcobra5272.h32 #define CONFIG_SYS_CLK 66000000 macro
H A Deb_cpu5282.h68 #define CONFIG_SYS_CLK 80000000 /* 8MHz * 8 */ macro
/openbmc/u-boot/board/freescale/m5253demo/
H A Dm5253demo.c35 RC = (CONFIG_SYS_CLK / 1000000) >> 1; in dram_init()
117 period = 1000000000 / (CONFIG_SYS_CLK / 2); /* period in ns */ in ide_set_reset()
/openbmc/u-boot/arch/m68k/cpu/mcf530x/
H A Dspeed.c17 gd->bus_clk = CONFIG_SYS_CLK; in get_clocks()
/openbmc/u-boot/arch/m68k/cpu/mcf547x_8x/
H A Dspeed.c23 gd->bus_clk = CONFIG_SYS_CLK; in get_clocks()
/openbmc/u-boot/arch/m68k/cpu/mcf523x/
H A Dspeed.c30 gd->bus_clk = CONFIG_SYS_CLK; in get_clocks()
H A Dcpu.c91 wdog_module = ((CONFIG_SYS_CLK / CONFIG_SYS_HZ) * CONFIG_WATCHDOG_TIMEOUT); in watchdog_init()
/openbmc/u-boot/arch/m68k/cpu/mcf532x/
H A Dcpu.c129 wdog_module = ((CONFIG_SYS_CLK / 1000) * CONFIG_WATCHDOG_TIMEOUT); in watchdog_init()
/openbmc/u-boot/board/BuS/eb_cpu5282/
H A Deb_cpu5282.c43 MCFSDRAMC_DCR_RC((15 * CONFIG_SYS_CLK / 1000000) >> 4); in dram_init()

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