| /openbmc/u-boot/arch/powerpc/cpu/mpc8xxx/ |
| H A D | fsl_lbc.c | 60 #if defined(CONFIG_SYS_BR0_PRELIM) && defined(CONFIG_SYS_OR0_PRELIM) in init_early_memctl_regs()
61 set_lbc_br(0, CONFIG_SYS_BR0_PRELIM); in init_early_memctl_regs()
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| /openbmc/u-boot/include/configs/ |
| H A D | P2041RDB.h | 226 #define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Address */ macro
231 #define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_FLASH_BR_PRELIM /* NOR Base Address */ macro
237 #define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_FLASH_BR_PRELIM /* NOR Base Address */ macro
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| H A D | corenet_ds.h | 235 #define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Address */ macro
240 #define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_FLASH_BR_PRELIM /* NOR Base Address */ macro
246 #define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_FLASH_BR_PRELIM /* NOR Base Address */ macro
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| H A D | sbc8548.h | 220 #define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_BR0_8M macro
229 #define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_BR0_64M macro
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| H A D | vme8349.h | 100 #define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE | \ macro
120 #define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE | \ macro
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| H A D | P1022DS.h | 204 #define CONFIG_SYS_BR0_PRELIM CONFIG_FLASH_BR_PRELIM /* NOR Base Address */ macro
256 #define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Address */ macro
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| H A D | M5272C3.h | 173 #define CONFIG_SYS_BR0_PRELIM 0xFFE00201 macro
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| H A D | cobra5272.h | 286 #define CONFIG_SYS_BR0_PRELIM 0xFFE00201 macro
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| H A D | MPC8313ERDB.h | 269 #define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_NAND_BR_PRELIM macro
274 #define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_NOR_BR_PRELIM macro
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| H A D | MPC8555CDS.h | 99 #define CONFIG_SYS_BR0_PRELIM 0xff801001 macro
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| H A D | MPC8541CDS.h | 101 #define CONFIG_SYS_BR0_PRELIM 0xff801001 macro
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| H A D | MPC8540ADS.h | 99 #define CONFIG_SYS_BR0_PRELIM 0xff001801 /* port size 32bit */ macro
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| H A D | controlcenterd.h | 148 #define CONFIG_SYS_BR0_PRELIM 0 /* CS0 was originally intended for FPGA */ macro
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| H A D | socrates.h | 106 #define CONFIG_SYS_BR0_PRELIM 0xfe001001 /* port size 16bit */ macro
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| H A D | MPC8568MDS.h | 107 #define CONFIG_SYS_BR0_PRELIM 0xfe001001 macro
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| H A D | P1023RDB.h | 133 #define CONFIG_SYS_BR0_PRELIM CONFIG_FLASH_BR_PRELIM /* NOR Base Address */ macro
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| H A D | MPC8560ADS.h | 98 #define CONFIG_SYS_BR0_PRELIM 0xff001801 /* port size 32bit */ macro
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| H A D | p1_p2_rdb_pc.h | 460 #define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Addr */ macro
465 #define CONFIG_SYS_BR0_PRELIM CONFIG_FLASH_BR_PRELIM /* NOR Base Address */ macro
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| /openbmc/u-boot/board/xes/xpedite520x/ |
| H A D | xpedite520x.c | 39 set_lbc_br(1, CONFIG_SYS_BR0_PRELIM); in flash_cs_fixup()
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| /openbmc/u-boot/board/xes/xpedite537x/ |
| H A D | xpedite537x.c | 37 set_lbc_br(1, CONFIG_SYS_BR0_PRELIM); in flash_cs_fixup()
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| /openbmc/u-boot/board/xes/xpedite550x/ |
| H A D | xpedite550x.c | 37 set_lbc_br(1, CONFIG_SYS_BR0_PRELIM); in flash_cs_fixup()
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| /openbmc/u-boot/board/xes/xpedite517x/ |
| H A D | xpedite517x.c | 42 set_lbc_br(1, CONFIG_SYS_BR0_PRELIM); in flash_cs_fixup()
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| /openbmc/u-boot/configs/ |
| H A D | MCR3000_defconfig | 16 CONFIG_SYS_BR0_PRELIM=0x04000801
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| /openbmc/u-boot/arch/powerpc/cpu/mpc8xx/ |
| H A D | cpu_init.c | 138 out_be32(&memctl->memc_br0, CONFIG_SYS_BR0_PRELIM); in cpu_init_f()
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| /openbmc/u-boot/include/configs/km/ |
| H A D | km83xx-common.h | 92 #define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE | \ macro
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