Searched refs:CNTFRQ (Results 1 – 12 of 12) sorted by relevance
| /openbmc/u-boot/arch/arm/mach-tegra/ |
| H A D | psci.S | 57 mrceq p15, 0, r7, c14, c0, 0 @ read CNTFRQ from CPU0
61 mcrne p15, 0, r7, c14, c0, 0 @ write CNTFRQ to CPU1..3
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| /openbmc/qemu/tests/qtest/ |
| H A D | sse-timer-test.c | 42 #define CNTFRQ 0x10 macro
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| /openbmc/linux/Documentation/translations/zh_CN/arch/arm64/ |
| H A D | booting.txt | 178 CNTFRQ 必须设定为计时器的频率，且 CNTVOFF 必须设定为对所有 CPU
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| /openbmc/linux/Documentation/translations/zh_TW/arch/arm64/ |
| H A D | booting.txt | 182 CNTFRQ 必須設定爲計時器的頻率，且 CNTVOFF 必須設定爲對所有 CPU
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| /openbmc/linux/Documentation/devicetree/bindings/timer/ |
| H A D | arm,arch_timer_mmio.yaml | 40 CNTFRQ on all CPUs to a uniform correct value. Use of this property is
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| H A D | arm,arch_timer.yaml | 63 CNTFRQ on all CPUs to a uniform correct value. Use of this property is
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| /openbmc/u-boot/arch/arm/cpu/armv7/ |
| H A D | nonsec_virt.S | 197 mcreq p15, 0, r1, c14, c0, 0 @ write CNTFRQ
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| /openbmc/u-boot/arch/arm/mach-aspeed/ast2600/ |
| H A D | platform.S | 130 mcr p15, 0, r0, c14, c0, 0 @; update CNTFRQ
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| /openbmc/qemu/hw/timer/ |
| H A D | sse-timer.c | 53 REG32(CNTFRQ, 0x10)
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| /openbmc/linux/drivers/clocksource/ |
| H A D | arm_arch_timer.c | 50 #define CNTFRQ 0x10 macro
1476 rate = readl_relaxed(base + CNTFRQ); in arch_timer_mem_frame_get_cntfrq()
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| /openbmc/linux/Documentation/arch/arm64/ |
| H A D | booting.rst | 192 CNTFRQ must be programmed with the timer frequency and CNTVOFF must
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| /openbmc/linux/arch/arm/boot/dts/samsung/ |
| H A D | exynos5250.dtsi | 1094 * of U-Boot on Exynos don't set the CNTFRQ register,
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