Searched refs:CLK_TOP_P1_1MHZ (Results 1 – 6 of 6) sorted by relevance
| /openbmc/linux/include/dt-bindings/clock/ |
| H A D | mt7629-clk.h | 21 #define CLK_TOP_P1_1MHZ 11 macro
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| H A D | mt7622-clk.h | 23 #define CLK_TOP_P1_1MHZ 11 macro
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| /openbmc/u-boot/include/dt-bindings/clock/ |
| H A D | mt7629-clk.h | 24 #define CLK_TOP_P1_1MHZ 11 macro
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| /openbmc/linux/drivers/clk/mediatek/ |
| H A D | clk-mt7622.c | 265 FACTOR(CLK_TOP_P1_1MHZ, "p1_1mhz", "eth1pll", 1, 500),
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| H A D | clk-mt7629.c | 364 FACTOR(CLK_TOP_P1_1MHZ, "p1_1mhz", "eth1pll", 1, 500),
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| /openbmc/u-boot/drivers/clk/mediatek/ |
| H A D | clk-mt7629.c | 87 FACTOR0(CLK_TOP_P1_1MHZ, CLK_APMIXED_ETH1PLL, 1, 500),
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