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Searched refs:CLK_TOP_IRTX_SEL (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Dmt7629-clk.h110 #define CLK_TOP_IRTX_SEL 100 macro
H A Dmt7622-clk.h95 #define CLK_TOP_IRTX_SEL 83 macro
/openbmc/u-boot/include/dt-bindings/clock/
H A Dmt7629-clk.h114 #define CLK_TOP_IRTX_SEL 100 macro
/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mt7622.c452 MUX_GATE(CLK_TOP_IRTX_SEL, "irtx_sel", f10m_ref_parents,
H A Dclk-mt7629.c522 MUX_GATE(CLK_TOP_IRTX_SEL, "irtx_sel", irrx_parents,
/openbmc/u-boot/drivers/clk/mediatek/
H A Dclk-mt7629.c404 MUX_GATE(CLK_TOP_IRTX_SEL, irrx_parents, 0xA0, 24, 1, 31),