Searched refs:CLK_TOP_DISP_SEL (Results 1 – 5 of 5) sorted by relevance
| /openbmc/linux/include/dt-bindings/clock/ |
| H A D | mt8135-clk.h | 80 #define CLK_TOP_DISP_SEL 69 macro
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| H A D | mt8192-clk.h | 16 #define CLK_TOP_DISP_SEL 4 macro
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| /openbmc/linux/drivers/clk/mediatek/ |
| H A D | clk-mt8135.c | 364 MUX_GATE(CLK_TOP_DISP_SEL, "disp_sel", disp_parents, 0x0144, 24, 3, 31),
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| H A D | clk-mt8192.c | 560 MUX_GATE_CLR_SET_UPD(CLK_TOP_DISP_SEL, "disp_sel",
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| /openbmc/linux/arch/arm64/boot/dts/mediatek/ |
| H A D | mt8192.dtsi | 562 clocks = <&topckgen CLK_TOP_DISP_SEL>,
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