Searched refs:CLK_TOP_4MHZ (Results 1 – 6 of 6) sorted by relevance
| /openbmc/linux/include/dt-bindings/clock/ |
| H A D | mt7629-clk.h | 22 #define CLK_TOP_4MHZ 12 macro
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| H A D | mt7622-clk.h | 24 #define CLK_TOP_4MHZ 12 macro
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| /openbmc/u-boot/include/dt-bindings/clock/ |
| H A D | mt7629-clk.h | 25 #define CLK_TOP_4MHZ 12 macro
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| /openbmc/linux/drivers/clk/mediatek/ |
| H A D | clk-mt7622.c | 266 FACTOR(CLK_TOP_4MHZ, "free_run_4mhz", "eth1pll", 1, 125),
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| H A D | clk-mt7629.c | 365 FACTOR(CLK_TOP_4MHZ, "free_run_4mhz", "eth1pll", 1, 125),
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| /openbmc/u-boot/drivers/clk/mediatek/ |
| H A D | clk-mt7629.c | 88 FACTOR0(CLK_TOP_4MHZ, CLK_APMIXED_ETH1PLL, 1, 125),
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