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Searched refs:CLK_PERI_UART2 (Results 1 – 18 of 18) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Dmt8135-clk.h146 #define CLK_PERI_UART2 8 macro
H A Dmediatek,mt6795-clk.h196 #define CLK_PERI_UART2 21 macro
H A Dmt8173-clk.h215 #define CLK_PERI_UART2 22 macro
H A Dmt2712-clk.h257 #define CLK_PERI_UART2 18 macro
H A Dmt2701-clk.h243 #define CLK_PERI_UART2 22 macro
/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mt8173-pericfg.c72 GATE_PERI0(CLK_PERI_UART2, "peri_uart2", "axi_sel", 21),
H A Dclk-mt6795-pericfg.c61 GATE_PERI(CLK_PERI_UART2, "peri_uart2", "axi_sel", 21),
H A Dclk-mt8135.c457 GATE_PERI0(CLK_PERI_UART2, "uart2_ck", "axi_sel", 24),
H A Dclk-mt2712.c903 GATE_PERI0(CLK_PERI_UART2, "per_uart2", "uart_sel", 22),
H A Dclk-mt2701.c834 GATE_PERI0(CLK_PERI_UART2, "uart2_ck", "axi_sel", 21),
/openbmc/u-boot/include/dt-bindings/clock/
H A Dmt7623-clk.h236 #define CLK_PERI_UART2 21 macro
/openbmc/linux/arch/arm/boot/dts/mediatek/
H A Dmt8135.dtsi244 clocks = <&pericfg CLK_PERI_UART2_SEL>, <&pericfg CLK_PERI_UART2>;
H A Dmt2701.dtsi279 clocks = <&pericfg CLK_PERI_UART2_SEL>, <&pericfg CLK_PERI_UART2>;
H A Dmt7623.dtsi403 <&pericfg CLK_PERI_UART2>;
/openbmc/u-boot/arch/arm/dts/
H A Dmt7623.dtsi214 <&pericfg CLK_PERI_UART2>;
/openbmc/u-boot/drivers/clk/mediatek/
H A Dclk-mt7623.c668 GATE_PERI0(CLK_PERI_UART2, CLK_TOP_AXI_SEL, 21),
/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt6795.dtsi541 clocks = <&pericfg CLK_PERI_UART2_SEL>, <&pericfg CLK_PERI_UART2>;
H A Dmt8173.dtsi692 clocks = <&pericfg CLK_PERI_UART2_SEL>, <&pericfg CLK_PERI_UART2>;