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Searched refs:CLK_PERI_UART0_PD (Results 1 – 9 of 9) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Dmt7629-clk.h141 #define CLK_PERI_UART0_PD 11 macro
H A Dmt7622-clk.h149 #define CLK_PERI_UART0_PD 13 macro
/openbmc/u-boot/include/dt-bindings/clock/
H A Dmt7629-clk.h145 #define CLK_PERI_UART0_PD 11 macro
/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mt7629.c440 GATE_PERI0(CLK_PERI_UART0_PD, "peri_uart0_pd", "faxi", 17),
623 clk_prepare_enable(clk_data->hws[CLK_PERI_UART0_PD]->clk); in mtk_pericfg_init()
H A Dclk-mt7622.c363 GATE_PERI0_AO(CLK_PERI_UART0_PD, "peri_uart0_pd", "axi_sel", 17),
/openbmc/u-boot/arch/arm/dts/
H A Dmt7629.dtsi184 <&pericfg CLK_PERI_UART0_PD>;
/openbmc/u-boot/drivers/clk/mediatek/
H A Dclk-mt7629.c481 GATE_PERI0(CLK_PERI_UART0_PD, CLK_TOP_FAXI, 17),
/openbmc/linux/arch/arm/boot/dts/mediatek/
H A Dmt7629.dtsi216 <&pericfg CLK_PERI_UART0_PD>;
/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt7622.dtsi396 <&pericfg CLK_PERI_UART0_PD>;