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Searched refs:CLKID_VCLK_DIV6 (Results 1 – 8 of 8) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Daxg-clkc.h135 #define CLKID_VCLK_DIV6 125 macro
H A Dgxbb-clkc.h196 #define CLKID_VCLK_DIV6 188 macro
H A Dmeson8b-clkc.h153 #define CLKID_VCLK_DIV6 146 macro
H A Dg12a-clkc.h162 #define CLKID_VCLK_DIV6 151 macro
/openbmc/linux/drivers/clk/meson/
H A Dmeson8b.c2923 [CLKID_VCLK_DIV6] = &meson8b_vclk_div6_div_gate.hw,
3127 [CLKID_VCLK_DIV6] = &meson8b_vclk_div6_div_gate.hw,
3342 [CLKID_VCLK_DIV6] = &meson8b_vclk_div6_div_gate.hw,
H A Dgxbb.c2916 [CLKID_VCLK_DIV6] = &gxbb_vclk_div6.hw,
3123 [CLKID_VCLK_DIV6] = &gxbb_vclk_div6.hw,
H A Dg12a.c4402 [CLKID_VCLK_DIV6] = &g12a_vclk_div6.hw,
4627 [CLKID_VCLK_DIV6] = &g12a_vclk_div6.hw,
4887 [CLKID_VCLK_DIV6] = &g12a_vclk_div6.hw,
H A Daxg.c2020 [CLKID_VCLK_DIV6] = &axg_vclk_div6.hw,