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Searched refs:CLKID_VCLK2_VENCI1 (Results 1 – 8 of 8) sorted by relevance

/openbmc/u-boot/include/dt-bindings/clock/
H A Dgxbb-clkc.h80 #define CLKID_VCLK2_VENCI1 74 macro
/openbmc/linux/include/dt-bindings/clock/
H A Dgxbb-clkc.h82 #define CLKID_VCLK2_VENCI1 74 macro
H A Dmeson8b-clkc.h81 #define CLKID_VCLK2_VENCI1 74 macro
H A Dg12a-clkc.h92 #define CLKID_VCLK2_VENCI1 81 macro
/openbmc/u-boot/drivers/clk/
H A Dclk_meson.c150 MESON_GATE(CLKID_VCLK2_VENCI1, HHI_GCLK_OTHER, 2),
/openbmc/linux/drivers/clk/meson/
H A Dmeson8b.c2850 [CLKID_VCLK2_VENCI1] = &meson8b_vclk2_venci1.hw,
3054 [CLKID_VCLK2_VENCI1] = &meson8b_vclk2_venci1.hw,
3269 [CLKID_VCLK2_VENCI1] = &meson8b_vclk2_venci1.hw,
H A Dgxbb.c2807 [CLKID_VCLK2_VENCI1] = &gxbb_vclk2_venci1.hw,
3015 [CLKID_VCLK2_VENCI1] = &gxbb_vclk2_venci1.hw,
H A Dg12a.c4332 [CLKID_VCLK2_VENCI1] = &g12a_vclk2_venci1.hw,
4557 [CLKID_VCLK2_VENCI1] = &g12a_vclk2_venci1.hw,
4817 [CLKID_VCLK2_VENCI1] = &g12a_vclk2_venci1.hw,