Searched refs:CAN1_BASE_ADDR (Results 1 – 2 of 2) sorted by relevance
| /openbmc/qemu/tests/qtest/ |
| H A D | xlnx-can-test.c | 32 #define CAN1_BASE_ADDR 0xFF070000 macro
105 qtest_writel(qts, CAN1_BASE_ADDR + R_ICR_OFFSET, ISR_RXOK); in read_data()
149 qtest_writel(qts, CAN1_BASE_ADDR + R_SRR_OFFSET, ENABLE_CAN); in test_can_bus()
150 qtest_writel(qts, CAN1_BASE_ADDR + R_MSR_OFFSET, NORMAL_MODE); in test_can_bus()
156 status = qtest_readl(qts, CAN1_BASE_ADDR + R_SR_OFFSET); in test_can_bus()
161 read_data(qts, CAN1_BASE_ADDR, buf_rx); in test_can_bus()
198 qtest_writel(qts, CAN1_BASE_ADDR + R_SRR_OFFSET, CONFIG_MODE); in test_can_loopback()
199 qtest_writel(qts, CAN1_BASE_ADDR + R_MSR_OFFSET, LOOPBACK_MODE); in test_can_loopback()
200 qtest_writel(qts, CAN1_BASE_ADDR + R_SRR_OFFSET, ENABLE_CAN); in test_can_loopback()
203 status = qtest_readl(qts, CAN1_BASE_ADDR + R_SR_OFFSET); in test_can_loopback()
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| /openbmc/u-boot/arch/arm/include/asm/arch-mx6/ |
| H A D | imx-regs.h | 177 #define CAN1_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x10000) macro
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