32 #define CAN1_BASE_ADDR          0xFF070000  macro
105     qtest_writel(qts, CAN1_BASE_ADDR + R_ICR_OFFSET, ISR_RXOK);  in read_data()
149     qtest_writel(qts, CAN1_BASE_ADDR + R_SRR_OFFSET, ENABLE_CAN);  in test_can_bus()
150     qtest_writel(qts, CAN1_BASE_ADDR + R_MSR_OFFSET, NORMAL_MODE);  in test_can_bus()
156     status = qtest_readl(qts, CAN1_BASE_ADDR + R_SR_OFFSET);  in test_can_bus()
161     read_data(qts, CAN1_BASE_ADDR, buf_rx);  in test_can_bus()
198     qtest_writel(qts, CAN1_BASE_ADDR + R_SRR_OFFSET, CONFIG_MODE);  in test_can_loopback()
199     qtest_writel(qts, CAN1_BASE_ADDR + R_MSR_OFFSET, LOOPBACK_MODE);  in test_can_loopback()
200     qtest_writel(qts, CAN1_BASE_ADDR + R_SRR_OFFSET, ENABLE_CAN);  in test_can_loopback()
203     status = qtest_readl(qts, CAN1_BASE_ADDR + R_SR_OFFSET);  in test_can_loopback()
207     send_data(qts, CAN1_BASE_ADDR, buf_tx);  in test_can_loopback()
208     read_data(qts, CAN1_BASE_ADDR, buf_rx);  in test_can_loopback()
234     qtest_writel(qts, CAN1_BASE_ADDR + R_SRR_OFFSET, ENABLE_CAN);  in test_can_filter()
235     qtest_writel(qts, CAN1_BASE_ADDR + R_MSR_OFFSET, NORMAL_MODE);  in test_can_filter()
241     status = qtest_readl(qts, CAN1_BASE_ADDR + R_SR_OFFSET);  in test_can_filter()
245     qtest_writel(qts, CAN1_BASE_ADDR + R_AFR, 0x0);  in test_can_filter()
246     qtest_writel(qts, CAN1_BASE_ADDR + R_AFMR1, 0xF7);  in test_can_filter()
247     qtest_writel(qts, CAN1_BASE_ADDR + R_AFIR1, 0x121F);  in test_can_filter()
248     qtest_writel(qts, CAN1_BASE_ADDR + R_AFMR2, 0x5431);  in test_can_filter()
249     qtest_writel(qts, CAN1_BASE_ADDR + R_AFIR2, 0x14);  in test_can_filter()
250     qtest_writel(qts, CAN1_BASE_ADDR + R_AFMR3, 0x1234);  in test_can_filter()
251     qtest_writel(qts, CAN1_BASE_ADDR + R_AFIR3, 0x5431);  in test_can_filter()
252     qtest_writel(qts, CAN1_BASE_ADDR + R_AFMR4, 0xFFF);  in test_can_filter()
253     qtest_writel(qts, CAN1_BASE_ADDR + R_AFIR4, 0x1234);  in test_can_filter()
255     qtest_writel(qts, CAN1_BASE_ADDR + R_AFR, 0xF);  in test_can_filter()
259     read_data(qts, CAN1_BASE_ADDR, buf_rx);  in test_can_filter()
284     qtest_writel(qts, CAN1_BASE_ADDR + R_SRR_OFFSET, ENABLE_CAN);  in test_can_sleepmode()
285     qtest_writel(qts, CAN1_BASE_ADDR + R_MSR_OFFSET, NORMAL_MODE);  in test_can_sleepmode()
291     status = qtest_readl(qts, CAN1_BASE_ADDR + R_SR_OFFSET);  in test_can_sleepmode()
294     send_data(qts, CAN1_BASE_ADDR, buf_tx);  in test_can_sleepmode()
330     qtest_writel(qts, CAN1_BASE_ADDR + R_SRR_OFFSET, ENABLE_CAN);  in test_can_snoopmode()
331     qtest_writel(qts, CAN1_BASE_ADDR + R_MSR_OFFSET, NORMAL_MODE);  in test_can_snoopmode()
337     status = qtest_readl(qts, CAN1_BASE_ADDR + R_SR_OFFSET);  in test_can_snoopmode()
340     send_data(qts, CAN1_BASE_ADDR, buf_tx);  in test_can_snoopmode()