/openbmc/linux/drivers/crypto/marvell/octeontx2/ |
H A D | otx2_cptpf_main.c | 24 otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, in cptpf_enable_vfpf_mbox_intr() 26 otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, in cptpf_enable_vfpf_mbox_intr() 31 otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, in cptpf_enable_vfpf_mbox_intr() 38 otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, in cptpf_enable_vfpf_mbox_intr() 50 otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, in cptpf_disable_vfpf_mbox_intr() 52 otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, in cptpf_disable_vfpf_mbox_intr() 55 otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, in cptpf_disable_vfpf_mbox_intr() 62 otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, in cptpf_disable_vfpf_mbox_intr() 73 otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, RVU_PF_VFFLR_INTX(0), in cptpf_enable_vf_flr_me_intrs() 77 otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, in cptpf_enable_vf_flr_me_intrs() [all …]
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H A D | otx2_cptvf_main.c | 16 otx2_cpt_write64(cptvf->reg_base, BLKADDR_RVUM, 0, OTX2_RVU_VF_INT, in cptvf_enable_pfvf_mbox_intrs() 20 otx2_cpt_write64(cptvf->reg_base, BLKADDR_RVUM, 0, in cptvf_enable_pfvf_mbox_intrs() 27 otx2_cpt_write64(cptvf->reg_base, BLKADDR_RVUM, 0, in cptvf_disable_pfvf_mbox_intrs() 31 otx2_cpt_write64(cptvf->reg_base, BLKADDR_RVUM, 0, OTX2_RVU_VF_INT, in cptvf_disable_pfvf_mbox_intrs()
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H A D | otx2_cptvf_mbox.c | 56 intr = otx2_cpt_read64(cptvf->reg_base, BLKADDR_RVUM, 0, in otx2_cptvf_pfvf_mbox_intr() 63 otx2_cpt_write64(cptvf->reg_base, BLKADDR_RVUM, 0, in otx2_cptvf_pfvf_mbox_intr()
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H A D | otx2_cptpf_mbox.c | 311 intr = otx2_cpt_read64(cptpf->reg_base, BLKADDR_RVUM, 0, in otx2_cptpf_vfpf_mbox_intr() 320 otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, in otx2_cptpf_vfpf_mbox_intr() 384 intr = otx2_cpt_read64(cptpf->reg_base, BLKADDR_RVUM, 0, RVU_PF_INT); in otx2_cptpf_afpf_mbox_intr() 401 otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, RVU_PF_INT, in otx2_cptpf_afpf_mbox_intr()
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/openbmc/linux/drivers/net/ethernet/marvell/octeontx2/af/ |
H A D | rvu.c | 306 cfg = rvu_read64(rvu, BLKADDR_RVUM, reg | (devnum << 16)); in rvu_get_blkaddr() 314 cfg = rvu_read64(rvu, BLKADDR_RVUM, reg | (devnum << 16)); in rvu_get_blkaddr() 322 cfg = rvu_read64(rvu, BLKADDR_RVUM, reg | (devnum << 16)); in rvu_get_blkaddr() 330 cfg = rvu_read64(rvu, BLKADDR_RVUM, reg | (devnum << 16)); in rvu_get_blkaddr() 400 rvu_write64(rvu, BLKADDR_RVUM, reg | (devnum << 16), num_lfs); in rvu_update_rsrc_map() 413 cfg = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_PFX_CFG(pf)); in rvu_get_pf_numvfs() 429 cfg = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_PFX_CFG(pf)); in rvu_get_hwvf() 457 cfg = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_PFX_CFG(pf)); in is_pf_func_valid() 469 if (blkaddr < BLKADDR_RVUM || blkaddr >= BLK_COUNT) in is_block_implemented() 494 rvu_write64(rvu, BLKADDR_RVUM, in rvu_setup_rvum_blk_revid() [all …]
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H A D | rvu_cn10k.c | 71 rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_SMMU_ADDR_REQ, iova); in rvu_get_lmtaddr() 75 rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_SMMU_TXN_REQ, val); in rvu_get_lmtaddr() 77 err = rvu_poll_reg(rvu, BLKADDR_RVUM, RVU_AF_SMMU_ADDR_RSP_STS, BIT_ULL(0), false); in rvu_get_lmtaddr() 82 val = rvu_read64(rvu, BLKADDR_RVUM, RVU_AF_SMMU_ADDR_RSP_STS); in rvu_get_lmtaddr() 91 pa = rvu_read64(rvu, BLKADDR_RVUM, RVU_AF_SMMU_TLN_FLIT0) >> 18; in rvu_get_lmtaddr()
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H A D | rvu_struct.h | 18 BLKADDR_RVUM = 0x0ULL, enumerator
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H A D | rvu_debugfs.c | 2720 cfg = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_PFX_CFG(pf)); in rvu_dbg_npc_mcam_info_display()
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H A D | rvu_nix.c | 3208 cfg = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_PFX_CFG(pf)); in nix_setup_mce_tables()
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/openbmc/linux/drivers/net/ethernet/marvell/octeontx2/nic/ |
H A D | otx2_common.h | 629 blkaddr = BLKADDR_RVUM; in otx2_get_regaddr()
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H A D | otx2_pf.c | 2800 rev = otx2_read64(nic, RVU_PF_BLOCK_ADDRX_DISC(BLKADDR_RVUM)); in otx2_check_pf_usable()
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