Searched refs:AR71XX_PLL_BASE (Results 1 – 9 of 9) sorted by relevance
| /openbmc/u-boot/arch/mips/mach-ath79/ |
| H A D | reset.c | 77 void __iomem *pregs = map_physmem(AR71XX_PLL_BASE, AR71XX_PLL_SIZE, in eth_init_ar933x()
112 void __iomem *pregs = map_physmem(AR71XX_PLL_BASE, AR71XX_PLL_SIZE, in eth_init_ar934x()
208 void __iomem *pregs = map_physmem(AR71XX_PLL_BASE, AR71XX_PLL_SIZE, in usb_reset_qca953x()
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| /openbmc/u-boot/arch/mips/mach-ath79/ar933x/ |
| H A D | clk.c | 36 regs = map_physmem(AR71XX_PLL_BASE, AR71XX_PLL_SIZE, in get_clocks()
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| H A D | lowlevel_init.S | 157 li t0, CKSEG1ADDR(AR71XX_PLL_BASE)
271 li t0, CKSEG1ADDR(AR71XX_PLL_BASE)
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| /openbmc/u-boot/arch/mips/mach-ath79/ar934x/ |
| H A D | clk.c | 107 void __iomem *pll_regs = map_physmem(AR71XX_PLL_BASE, in ar934x_pll_init()
265 regs = map_physmem(AR71XX_PLL_BASE, AR71XX_PLL_SIZE, in ar934x_update_clock()
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| /openbmc/u-boot/arch/mips/mach-ath79/qca953x/ |
| H A D | clk.c | 36 regs = map_physmem(AR71XX_PLL_BASE, AR71XX_PLL_SIZE, in get_clocks()
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| H A D | lowlevel_init.S | 134 li t0, CKSEG1ADDR(AR71XX_PLL_BASE)
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| /openbmc/linux/arch/mips/ath79/ |
| H A D | setup.c | 227 ath79_pll_base = ioremap(AR71XX_PLL_BASE, in plat_mem_setup()
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| /openbmc/u-boot/arch/mips/mach-ath79/include/mach/ |
| H A D | ar71xx_regs.h | 46 #define AR71XX_PLL_BASE \ macro
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| /openbmc/linux/arch/mips/include/asm/mach-ath79/ |
| H A D | ar71xx_regs.h | 39 #define AR71XX_PLL_BASE (AR71XX_APB_BASE + 0x00050000) macro
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