Searched refs:ANATOP_BASE_ADDR (Results 1 – 14 of 14) sorted by relevance
482 ANATOP_BASE_ADDR + ANADIG_ARM_PLL + REG_SET); in imx_pll_suspend()484 ANATOP_BASE_ADDR + ANADIG_DDR_PLL + REG_SET); in imx_pll_suspend()486 ANATOP_BASE_ADDR + ANADIG_SYS_PLL + REG_SET); in imx_pll_suspend()488 ANATOP_BASE_ADDR + ANADIG_ENET_PLL + REG_SET); in imx_pll_suspend()490 ANATOP_BASE_ADDR + ANADIG_AUDIO_PLL + REG_SET); in imx_pll_suspend()492 ANATOP_BASE_ADDR + ANADIG_VIDEO_PLL + REG_SET); in imx_pll_suspend()498 ANATOP_BASE_ADDR + ANADIG_ARM_PLL + REG_CLR); in imx_pll_resume()500 ANATOP_BASE_ADDR + ANADIG_DDR_PLL + REG_CLR); in imx_pll_resume()502 ANATOP_BASE_ADDR + ANADIG_SYS_PLL + REG_CLR); in imx_pll_resume()504 ANATOP_BASE_ADDR + ANADIG_ENET_PLL + REG_CLR); in imx_pll_resume()[all …]
54 .regs = (void *)ANATOP_BASE_ADDR,149 ANATOP_BASE_ADDR; in get_cpu_rev()
19 ANATOP_BASE_ADDR;
42 .regs = (void *)ANATOP_BASE_ADDR,68 struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR; in get_cpu_rev()229 struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR; in clear_ldo_ramp()250 struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR; in set_ldo_voltage()328 struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR; in init_bandgap()560 struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR; in s_init()
911 (struct anatop_regs __iomem *)ANATOP_BASE_ADDR; in enable_fec_anatop_clock()1109 (struct anatop_regs *)ANATOP_BASE_ADDR; in enable_pcie_clock()1195 (struct anatop_regs __iomem *)ANATOP_BASE_ADDR; in enable_pll3()
135 struct anamix_pll *ana_pll = (struct anamix_pll *)ANATOP_BASE_ADDR; in get_cpu_rev()
16 static struct anamix_pll *ana_pll = (struct anamix_pll *)ANATOP_BASE_ADDR;
144 ANATOP_BASE_ADDR; in read_cpu_temperature()
87 (struct anatop_regs __iomem *)ANATOP_BASE_ADDR; in usb_power_config()
272 struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR; in setup_fec()
110 struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR; in setup_fec()
41 #define ANATOP_BASE_ADDR 0x30360000 macro
193 #define ANATOP_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x48000) macro
112 #define ANATOP_BASE_ADDR (AIPS1_OFF_BASE_ADDR+0x160000) macro