Home
last modified time | relevance | path

Searched refs:PNAME (Results 1 – 25 of 35) sorted by relevance

12

/openbmc/linux/drivers/clk/samsung/
H A Dclk-exynos5420.c300 PNAME(mout_apll_p) = {"fin_pll", "fout_apll"};
301 PNAME(mout_bpll_p) = {"fin_pll", "fout_bpll"};
302 PNAME(mout_cpll_p) = {"fin_pll", "fout_cpll"};
303 PNAME(mout_dpll_p) = {"fin_pll", "fout_dpll"};
304 PNAME(mout_epll_p) = {"fin_pll", "fout_epll"};
305 PNAME(mout_ipll_p) = {"fin_pll", "fout_ipll"};
306 PNAME(mout_kpll_p) = {"fin_pll", "fout_kpll"};
307 PNAME(mout_mpll_p) = {"fin_pll", "fout_mpll"};
308 PNAME(mout_rpll_p) = {"fin_pll", "fout_rpll"};
309 PNAME(mout_spll_p) = {"fin_pll", "fout_spll"};
[all …]
H A Dclk-exynos5260.c103 PNAME(mout_aud_pll_user_p) = {"fin_pll", "fout_aud_pll"};
197 PNAME(mout_phyclk_hdmi_phy_ref_clko_user_p) = {"fin_pll",
207 PNAME(mout_phyclk_dptx_phy_clk_div2_user_p) = {"fin_pll",
373 PNAME(mout_egl_b_p) = {"mout_egl_pll", "dout_bus_pll"};
374 PNAME(mout_egl_pll_p) = {"fin_pll", "fout_egl_pll"};
628 PNAME(mout_g3d_pll_p) = {"fin_pll", "fout_g3d_pll"};
944 PNAME(mout_kfc_pll_p) = {"fin_pll", "fout_kfc_pll"};
1083 PNAME(mout_mem_pll_p) = {"fin_pll", "fout_mem_pll"};
1084 PNAME(mout_bus_pll_p) = {"fin_pll", "fout_bus_pll"};
1485 PNAME(mout_aud_pll_p) = {"fin_pll", "fout_aud_pll"};
[all …]
H A Dclk-exynos7.c51 PNAME(mout_topc_group2) = { "mout_topc_bus0_pll_half",
55 PNAME(mout_topc_bus0_pll_half_p) = { "mout_topc_bus0_pll",
57 PNAME(mout_topc_bus1_pll_half_p) = { "mout_topc_bus1_pll",
59 PNAME(mout_topc_cc_pll_half_p) = { "mout_topc_cc_pll",
61 PNAME(mout_topc_mfc_pll_half_p) = { "mout_topc_mfc_pll",
65 PNAME(mout_topc_bus0_pll_out_p) = {"mout_topc_bus0_pll",
240 PNAME(mout_top0_cc_pll_half_p) = {"mout_top0_cc_pll_user",
245 PNAME(mout_top0_group1) = {"mout_top0_bus0_pll_half",
248 PNAME(mout_top0_group3) = {"ioclk_audiocdclk0",
433 PNAME(mout_top1_group1) = {"mout_top1_bus0_pll_half",
[all …]
H A Dclk-exynos850.c220 PNAME(mout_mmc_pll_p) = { "oscclk", "fout_mmc_pll" };
270 PNAME(mout_peri_ip_p) = { "oscclk", "dout_shared0_div4",
762 PNAME(mout_aud_pll_p) = { "oscclk", "fout_aud_pll" };
763 PNAME(mout_aud_cpu_user_p) = { "oscclk", "dout_aud" };
968 PNAME(mout_cmgp_adc_p) = { "oscclk", "dout_cmgp_adc" };
1067 PNAME(mout_g3d_pll_p) = { "oscclk", "fout_g3d_pll" };
1172 PNAME(mout_hsi_rtc_p) = { "rtcclk", "oscclk" };
1284 PNAME(mout_is_bus_user_p) = { "oscclk", "dout_is_bus" };
1285 PNAME(mout_is_itp_user_p) = { "oscclk", "dout_is_itp" };
1286 PNAME(mout_is_vra_user_p) = { "oscclk", "dout_is_vra" };
[all …]
H A Dclk-exynos7885.c175 PNAME(mout_peri_spi0_p) = { "oscclk", "dout_shared0_div4" };
176 PNAME(mout_peri_spi1_p) = { "oscclk", "dout_shared0_div4" };
177 PNAME(mout_peri_uart0_p) = { "oscclk", "dout_shared0_div4" };
178 PNAME(mout_peri_uart1_p) = { "oscclk", "dout_shared0_div4" };
179 PNAME(mout_peri_uart2_p) = { "oscclk", "dout_shared0_div4" };
180 PNAME(mout_peri_usi0_p) = { "oscclk", "dout_shared0_div4" };
181 PNAME(mout_peri_usi1_p) = { "oscclk", "dout_shared0_div4" };
182 PNAME(mout_peri_usi2_p) = { "oscclk", "dout_shared0_div4" };
450 PNAME(mout_peri_bus_user_p) = { "oscclk", "dout_peri_bus" };
612 PNAME(mout_core_bus_user_p) = { "oscclk", "dout_core_bus" };
[all …]
H A Dclk-exynos5433.c2005 PNAME(mout_phyclk_usbhost20_phy_hsic1_p)
2013 PNAME(mout_phyclk_usbdrd30_udrd30_pipe_pclk_p)
2017 PNAME(mout_phyclk_ufs_rx1_symbol_user_p)
2019 PNAME(mout_phyclk_ufs_rx0_symbol_user_p)
2021 PNAME(mout_phyclk_ufs_tx1_symbol_user_p)
2023 PNAME(mout_phyclk_ufs_tx0_symbol_user_p)
2025 PNAME(mout_phyclk_lli_mphy_to_ufs_user_p)
2027 PNAME(mout_sclk_mphy_p)
2608 PNAME(mout_sclk_decon_tv_vclk_c_disp_p) = {
3585 PNAME(mout_apollo_p) = { "mout_apollo_pll",
[all …]
H A Dclk-exynosautov9.c366 PNAME(mout_shared0_pll_p) = { "oscclk", "fout_shared0_pll" };
367 PNAME(mout_shared1_pll_p) = { "oscclk", "fout_shared1_pll" };
368 PNAME(mout_shared2_pll_p) = { "oscclk", "fout_shared2_pll" };
369 PNAME(mout_shared3_pll_p) = { "oscclk", "fout_shared3_pll" };
370 PNAME(mout_shared4_pll_p) = { "oscclk", "fout_shared4_pll" };
391 PNAME(mout_clkcmu_cpucl0_switch_p) = {
394 PNAME(mout_clkcmu_cpucl0_cluster_p) = {
406 PNAME(mout_clkcmu_fsys0_bus_p) = {
412 PNAME(mout_clkcmu_fsys1_usbdrd_p) = {
415 PNAME(mout_clkcmu_fsys1_mmc_card_p) = {
[all …]
H A Dclk-exynos5410.c70 PNAME(apll_p) = { "fin_pll", "fout_apll", };
71 PNAME(bpll_p) = { "fin_pll", "fout_bpll", };
72 PNAME(cpll_p) = { "fin_pll", "fout_cpll" };
73 PNAME(epll_p) = { "fin_pll", "fout_epll" };
74 PNAME(mpll_p) = { "fin_pll", "fout_mpll", };
75 PNAME(kpll_p) = { "fin_pll", "fout_kpll", };
77 PNAME(mout_cpu_p) = { "mout_apll", "sclk_mpll", };
78 PNAME(mout_kfc_p) = { "mout_kpll", "sclk_mpll", };
80 PNAME(mpll_user_p) = { "fin_pll", "sclk_mpll", };
81 PNAME(bpll_user_p) = { "fin_pll", "sclk_bpll", };
[all …]
H A Dclk-exynos5250.c173 PNAME(mout_apll_p) = { "fin_pll", "fout_apll", };
174 PNAME(mout_cpu_p) = { "mout_apll", "mout_mpll", };
176 PNAME(mout_mpll_p) = { "fin_pll", "mout_mpll_fout" };
178 PNAME(mout_bpll_p) = { "fin_pll", "mout_bpll_fout" };
180 PNAME(mout_vpll_p) = { "mout_vpllsrc", "fout_vpll" };
181 PNAME(mout_cpll_p) = { "fin_pll", "fout_cpll" };
182 PNAME(mout_epll_p) = { "fin_pll", "fout_epll" };
183 PNAME(mout_gpll_p) = { "fin_pll", "fout_gpll" };
184 PNAME(mout_mpll_user_p) = { "fin_pll", "mout_mpll" };
185 PNAME(mout_bpll_user_p) = { "fin_pll", "mout_bpll" };
[all …]
H A Dclk-exynos4.c283 PNAME(mout_apll_p) = { "fin_pll", "fout_apll", };
284 PNAME(mout_mpll_p) = { "fin_pll", "fout_mpll", };
285 PNAME(mout_epll_p) = { "fin_pll", "fout_epll", };
286 PNAME(mout_vpllsrc_p) = { "fin_pll", "sclk_hdmi24m", };
287 PNAME(mout_vpll_p) = { "fin_pll", "fout_vpll", };
288 PNAME(sclk_evpll_p) = { "sclk_epll", "sclk_vpll", };
289 PNAME(mout_mfc_p) = { "mout_mfc0", "mout_mfc1", };
290 PNAME(mout_g3d_p) = { "mout_g3d0", "mout_g3d1", };
291 PNAME(mout_g2d_p) = { "mout_g2d0", "mout_g2d1", };
293 PNAME(mout_jpeg_p) = { "mout_jpeg0", "mout_jpeg1", };
[all …]
H A Dclk-exynos3250.c179 PNAME(mout_vpllsrc_p) = { "fin_pll", };
181 PNAME(mout_apll_p) = { "fin_pll", "fout_apll", };
182 PNAME(mout_mpll_p) = { "fin_pll", "fout_mpll", };
183 PNAME(mout_vpll_p) = { "fin_pll", "fout_vpll", };
184 PNAME(mout_upll_p) = { "fin_pll", "fout_upll", };
194 PNAME(mout_gdl_p) = { "mout_mpll_user_l", };
195 PNAME(mout_gdr_p) = { "mout_mpll_user_r", };
197 PNAME(mout_aclk_400_mcuisp_sub_p)
200 PNAME(mout_aclk_266_1_p) = { "mout_epll_user", };
206 PNAME(group_sclk_p) = { "xxti", "xusbxti",
[all …]
H A Dclk-s3c64xx.c86 PNAME(spi_mmc_p) = { "mout_epll", "dout_mpll", "fin_pll", "clk27m" };
87 PNAME(uart_p) = { "mout_epll", "dout_mpll" };
88 PNAME(audio0_p) = { "mout_epll", "dout_mpll", "fin_pll", "iiscdclk0",
92 PNAME(mfc_p) = { "hclkx2", "mout_epll" };
93 PNAME(apll_p) = { "fin_pll", "fout_apll" };
94 PNAME(mpll_p) = { "fin_pll", "fout_mpll" };
95 PNAME(epll_p) = { "fin_pll", "fout_epll" };
96 PNAME(hclkx2_p) = { "mout_mpll", "mout_apll" };
100 PNAME(irda_p6400) = { "mout_epll", "dout_mpll", "none", "clk48m" };
101 PNAME(uhost_p6400) = { "clk48m", "mout_epll", "dout_mpll", "none" };
[all …]
/openbmc/linux/drivers/clk/rockchip/
H A Dclk-rk3568.c213 PNAME(mux_pll_p) = { "xin24m" };
215 PNAME(mux_armclk_p) = { "apll", "gpll" };
238 PNAME(npll_gpll_p) = { "npll", "gpll" };
239 PNAME(cpll_gpll_p) = { "cpll", "gpll" };
240 PNAME(gpll_cpll_p) = { "gpll", "cpll" };
249 PNAME(clk_ddr1x_p) = { "clk_ddrphy1x_src", "dpll" };
285 PNAME(xin24m_32k_p) = { "xin24m", "clk_rtc_32k" };
306 PNAME(clk_hdmi_ref_p) = { "hpll", "hpll_ph0" };
307 PNAME(clk_pdpmu_p) = { "ppll", "gpll" };
309 PNAME(clk_pwm0_p) = { "xin24m", "clk_pdpmu" };
[all …]
H A Dclk-rk3308.c122 PNAME(mux_pll_p) = { "xin24m" };
125 PNAME(mux_dpll_vpll0_p) = { "dpll", "vpll0" };
127 PNAME(mux_dpll_vpll0_vpll1_p) = { "dpll", "vpll0", "vpll1" };
130 PNAME(mux_vpll0_vpll1_p) = { "vpll0", "vpll1" };
140 PNAME(mux_sdio_p) = { "clk_sdio_div", "clk_sdio_div50" };
141 PNAME(mux_emmc_p) = { "clk_emmc_div", "clk_emmc_div50" };
142 PNAME(mux_mac_p) = { "clk_mac_src", "mac_clkin" };
148 PNAME(mux_wifi_p) = { "clk_wifi_osc", "clk_wifi_src" };
149 PNAME(mux_pdm_p) = { "clk_pdm_src", "clk_pdm_frac" };
171 PNAME(mux_i2s0_2ch_out_p) = { "clk_i2s0_2ch", "xin12m" };
[all …]
H A Dclk-px30.c137 PNAME(mux_pll_p) = { "xin24m"};
139 PNAME(mux_armclk_p) = { "apll_core", "gpll_core" };
140 PNAME(mux_ddrphy_p) = { "dpll_ddr", "gpll_ddr" };
143 PNAME(mux_cpll_npll_p) = { "cpll", "npll" };
144 PNAME(mux_npll_cpll_p) = { "npll", "cpll" };
145 PNAME(mux_gpll_cpll_p) = { "gpll", "dummy_cpll" };
146 PNAME(mux_gpll_npll_p) = { "gpll", "npll" };
147 PNAME(mux_gpll_xin24m_p) = { "gpll", "xin24m"};
158 PNAME(mux_i2s1_out_p) = { "clk_i2s1", "xin12m"};
159 PNAME(mux_i2s2_out_p) = { "clk_i2s2", "xin12m"};
[all …]
H A Dclk-rk3228.c132 PNAME(mux_pll_p) = { "clk_24m", "xin24m" };
137 PNAME(mux_usb480m_p) = { "usb480m_phy", "xin24m" };
138 PNAME(mux_hdmiphy_p) = { "hdmiphy_phy", "xin24m" };
142 PNAME(mux_pll_src_3plls_p) = { "cpll", "gpll", "hdmiphy" };
143 PNAME(mux_pll_src_2plls_p) = { "cpll", "gpll" };
144 PNAME(mux_sclk_hdmi_cec_p) = { "cpll", "gpll", "xin24m" };
151 PNAME(mux_sclk_vop_src_p) = { "gpll_vop", "cpll_vop" };
152 PNAME(mux_dclk_vop_p) = { "hdmiphy", "sclk_vop_pre" };
156 PNAME(mux_i2s_out_p) = { "i2s1_pre", "xin12m" };
157 PNAME(mux_i2s2_p) = { "i2s2_src", "i2s2_frac", "xin12m" };
[all …]
H A Dclk-rv1108.c119 PNAME(mux_pll_p) = { "xin24m", "xin24m"};
122 PNAME(mux_usb480m_pre_p) = { "usbphy", "xin24m" };
123 PNAME(mux_hdmiphy_phy_p) = { "hdmiphy", "xin24m" };
126 PNAME(mux_pll_src_2plls_p) = { "dpll", "gpll" };
127 PNAME(mux_pll_src_apll_gpll_p) = { "apll", "gpll" };
135 PNAME(mux_sclk_mac_p) = { "sclk_mac_pre", "ext_gmac" };
137 PNAME(mux_i2s_out_p) = { "i2s0_pre", "xin12m" };
140 PNAME(mux_wifi_src_p) = { "gpll", "xin24m" };
141 PNAME(mux_cifout_src_p) = { "hdmiphy", "gpll" };
142 PNAME(mux_cifout_p) = { "sclk_cifout_src", "xin24m" };
[all …]
H A Dclk-rv1126.c145 PNAME(mux_pll_p) = { "xin24m" };
150 PNAME(mux_xin24m_gpll_p) = { "xin24m", "gpll" };
151 PNAME(mux_gpll_xin24m_p) = { "gpll", "xin24m" };
152 PNAME(mux_xin24m_32k_p) = { "xin24m", "clk_rtc32k" };
157 PNAME(mux_armclk_p) = { "gpll", "cpll", "apll" };
159 PNAME(mux_gpll_cpll_p) = { "gpll", "cpll" };
167 PNAME(mux_cpll_gpll_p) = { "cpll", "gpll" };
173 PNAME(mux_i2s1_out2io_p) = { "mclk_i2s1", "xin12m" };
175 PNAME(mux_i2s2_out2io_p) = { "mclk_i2s2", "xin12m" };
179 PNAME(mux_usb480m_gpll_p) = { "usb480m", "gpll" };
[all …]
H A Dclk-rk3588.c444 PNAME(mux_pll_p) = { "xin24m", "xin32k" };
445 PNAME(mux_armclkl_p) = { "xin24m", "gpll", "lpll" };
449 PNAME(gpll_24m_p) = { "gpll", "xin24m" };
450 PNAME(gpll_aupll_p) = { "gpll", "aupll" };
451 PNAME(gpll_lpll_p) = { "gpll", "lpll" };
452 PNAME(gpll_cpll_p) = { "gpll", "cpll" };
453 PNAME(gpll_spll_p) = { "gpll", "spll" };
454 PNAME(gpll_cpll_24m_p) = { "gpll", "cpll", "xin24m"};
456 PNAME(gpll_cpll_npll_p) = { "gpll", "cpll", "npll"};
468 PNAME(mux_24m_32k_p) = { "xin24m", "xin32k" };
[all …]
H A Dclk-rk3328.c143 PNAME(mux_pll_p) = { "xin24m" };
151 PNAME(mux_4plls_p) = { "cpll", "gpll",
160 PNAME(mux_armclk_p) = { "apll_core",
165 PNAME(mux_usb480m_p) = { "usb480m_phy",
168 PNAME(mux_i2s0_p) = { "clk_i2s0_div",
172 PNAME(mux_i2s1_p) = { "clk_i2s1_div",
176 PNAME(mux_i2s2_p) = { "clk_i2s2_div",
182 PNAME(mux_spdif_p) = { "clk_spdif_div",
186 PNAME(mux_uart0_p) = { "clk_uart0_div",
198 PNAME(mux_dclk_lcdc_p) = { "hdmiphy",
[all …]
H A Dclk-rk3399.c109 PNAME(mux_pll_p) = { "xin24m", "xin32k" };
111 PNAME(mux_armclkl_p) = { "clk_core_l_lpll_src",
119 PNAME(mux_ddrclk_p) = { "clk_ddrc_lpll_src",
123 PNAME(mux_aclk_cci_p) = { "cpll_aclk_cci_src",
127 PNAME(mux_cci_trace_p) = { "cpll_cci_trace",
129 PNAME(mux_cs_p) = { "cpll_cs", "gpll_cs",
158 PNAME(mux_dclk_vop0_p) = { "dclk_vop0_div",
160 PNAME(mux_dclk_vop1_p) = { "dclk_vop1_div",
200 PNAME(mux_i2sch_p) = { "clk_i2s0", "clk_i2s1",
210 PNAME(mux_ppll_24m_p) = { "ppll", "xin24m" };
[all …]
H A Dclk-rk3036.c115 PNAME(mux_pll_p) = { "xin24m", "xin24m" };
117 PNAME(mux_armclk_p) = { "apll", "gpll_armclk" };
118 PNAME(mux_busclk_p) = { "apll", "dpll_cpu", "gpll_cpu" };
119 PNAME(mux_ddrphy_p) = { "dpll_ddr", "gpll_ddr" };
120 PNAME(mux_pll_src_3plls_p) = { "apll", "dpll", "gpll" };
121 PNAME(mux_timer_p) = { "xin24m", "pclk_peri_src" };
126 PNAME(mux_mmc_src_p) = { "apll", "dpll", "gpll", "xin24m" };
128 PNAME(mux_i2s_clkout_p) = { "i2s_pre", "xin12m" };
129 PNAME(mux_spdif_p) = { "spdif_src", "spdif_frac", "xin12m" };
133 PNAME(mux_mac_p) = { "mac_pll_src", "rmii_clkin" };
[all …]
H A Dclk-rk3368.c90 PNAME(mux_pll_p) = { "xin24m", "xin32k" };
91 PNAME(mux_armclkb_p) = { "apllb_core", "gpllb_core" };
92 PNAME(mux_armclkl_p) = { "aplll_core", "gplll_core" };
93 PNAME(mux_ddrphy_p) = { "dpll_ddr", "gpll_ddr" };
97 PNAME(mux_pll_src_cpll_gpll_p) = { "cpll", "gpll" };
112 PNAME(mux_i2s_2ch_p) = { "i2s_2ch_src", "i2s_2ch_frac",
116 PNAME(mux_edp_24m_p) = { "xin24m", "dummy" };
117 PNAME(mux_vip_out_p) = { "vip_src", "xin24m" };
118 PNAME(mux_usbphy480m_p) = { "usbotg_out", "xin24m" };
123 PNAME(mux_uart2_p) = { "uart2_src", "xin24m" };
[all …]
H A Dclk-rk3128.c130 PNAME(mux_pll_p) = { "clk_24m", "xin24m" };
132 PNAME(mux_ddrphy_p) = { "dpll_ddr", "gpll_div2_ddr" };
133 PNAME(mux_armclk_p) = { "apll_core", "gpll_div2_core" };
134 PNAME(mux_usb480m_p) = { "usb480m_phy", "xin24m" };
139 PNAME(mux_pll_src_3plls_p) = { "cpll", "gpll", "gpll_div2" };
143 PNAME(mux_clk_cif_out_src_p) = { "clk_cif_src", "xin24m" };
148 PNAME(mux_i2s_out_p) = { "i2s1_pre", "xin12m" };
151 PNAME(mux_uart0_p) = { "uart0_src", "uart0_frac", "xin24m" };
152 PNAME(mux_uart1_p) = { "uart1_src", "uart1_frac", "xin24m" };
153 PNAME(mux_uart2_p) = { "uart2_src", "uart2_frac", "xin24m" };
[all …]
/openbmc/linux/drivers/clk/pistachio/
H A Dclk-pistachio.c106 PNAME(mux_xtal_mips) = { "xtal", "mips_pll" };
109 PNAME(mux_xtal_rpu_v) = { "xtal", "rpu_v_pll" };
110 PNAME(mux_xtal_rpu_l) = { "xtal", "rpu_l_pll" };
112 PNAME(mux_xtal_wifi) = { "xtal", "wifi_pll" };
113 PNAME(mux_xtal_wifi_div4) = { "xtal", "wifi_div4" };
114 PNAME(mux_xtal_wifi_div8) = { "xtal", "wifi_div8" };
117 PNAME(mux_xtal_sys) = { "xtal", "sys_pll" };
118 PNAME(mux_sys_enet) = { "sys_internal_div", "enet_in" };
120 PNAME(mux_sys_bt) = { "sys_internal_div", "bt_pll_mux" };
121 PNAME(mux_xtal_bt) = { "xtal", "bt_pll" };
[all …]

12