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/openbmc/phosphor-networkd/src/ibm/hypervisor-network-mgr-src/
H A Dhyp_ethernet_interface.cpp19 bool HypEthInterface::ipv6AcceptRA(bool value) in ipv6AcceptRA() argument
22 if (currValue != value) in ipv6AcceptRA()
24 HypEthernetIntf::ipv6AcceptRA(value); in ipv6AcceptRA()
26 return value; in ipv6AcceptRA()
29 bool HypEthInterface::dhcp4(bool value) in dhcp4() argument
32 if (currValue != value) in dhcp4()
34 HypEthernetIntf::dhcp4(value); in dhcp4()
36 return value; in dhcp4()
39 bool HypEthInterface::dhcp6(bool value) in dhcp6() argument
42 if (currValue != value) in dhcp6()
[all …]
/openbmc/linux/drivers/video/fbdev/core/
H A Dsvgalib.c24 void svga_wcrt_multi(void __iomem *regbase, const struct vga_regset *regset, u32 value) in svga_wcrt_multi() argument
34 if (value & 1) regval = regval | bitval; in svga_wcrt_multi()
36 value = value >> 1; in svga_wcrt_multi()
44 void svga_wseq_multi(void __iomem *regbase, const struct vga_regset *regset, u32 value) in svga_wseq_multi() argument
54 if (value & 1) regval = regval | bitval; in svga_wseq_multi()
56 value = value >> 1; in svga_wseq_multi()
440 u32 value; in svga_check_timings() local
448 value = var->xres + var->left_margin + var->right_margin + var->hsync_len; in svga_check_timings()
449 if (((value / 8) - 5) >= svga_regset_size (tm->h_total_regs)) in svga_check_timings()
453 value = var->xres; in svga_check_timings()
[all …]
/openbmc/linux/drivers/net/ethernet/microchip/sparx5/
H A Dsparx5_vcap_debugfs.c16 static const char *sparx5_vcap_is0_etype_str(u32 value) in sparx5_vcap_is0_etype_str() argument
18 switch (value) { in sparx5_vcap_is0_etype_str()
40 static const char *sparx5_vcap_is0_mpls_str(u32 value) in sparx5_vcap_is0_mpls_str() argument
42 switch (value) { in sparx5_vcap_is0_mpls_str()
64 static const char *sparx5_vcap_is0_mlbs_str(u32 value) in sparx5_vcap_is0_mlbs_str() argument
66 switch (value) { in sparx5_vcap_is0_mlbs_str()
82 u32 value, val; in sparx5_vcap_is0_port_keys() local
90 value = spx5_rd(sparx5, in sparx5_vcap_is0_port_keys()
93 if (ANA_CL_ADV_CL_CFG_LOOKUP_ENA_GET(value)) in sparx5_vcap_is0_port_keys()
97 val = ANA_CL_ADV_CL_CFG_ETYPE_CLM_KEY_SEL_GET(value); in sparx5_vcap_is0_port_keys()
[all …]
/openbmc/linux/drivers/crypto/cavium/nitrox/
H A Dnitrox_isr.c34 slc_cnts.value = readq(cmdq->compl_cnt_csr_addr); in nps_pkt_slc_isr()
44 u64 value; in clear_nps_core_err_intr() local
47 value = nitrox_read_csr(ndev, NPS_CORE_INT); in clear_nps_core_err_intr()
48 nitrox_write_csr(ndev, NPS_CORE_INT, value); in clear_nps_core_err_intr()
50 dev_err_ratelimited(DEV(ndev), "NSP_CORE_INT 0x%016llx\n", value); in clear_nps_core_err_intr()
56 unsigned long value, offset; in clear_nps_pkt_err_intr() local
59 pkt_int.value = nitrox_read_csr(ndev, NPS_PKT_INT); in clear_nps_pkt_err_intr()
61 pkt_int.value); in clear_nps_pkt_err_intr()
65 value = nitrox_read_csr(ndev, offset); in clear_nps_pkt_err_intr()
66 nitrox_write_csr(ndev, offset, value); in clear_nps_pkt_err_intr()
[all …]
H A Dnitrox_hal.c22 emu_ae.value = 0; in emu_enable_cores()
26 emu_se.value = 0; in emu_enable_cores()
31 nitrox_write_csr(ndev, EMU_AE_ENABLEX(i), emu_ae.value); in emu_enable_cores()
32 nitrox_write_csr(ndev, EMU_SE_ENABLEX(i), emu_se.value); in emu_enable_cores()
51 emu_ge_int.value = 0; in nitrox_config_emu_unit()
54 emu_wd_int.value = 0; in nitrox_config_emu_unit()
59 nitrox_write_csr(ndev, offset, emu_wd_int.value); in nitrox_config_emu_unit()
61 nitrox_write_csr(ndev, offset, emu_ge_int.value); in nitrox_config_emu_unit()
74 pkt_in_ctl.value = nitrox_read_csr(ndev, offset); in reset_pkt_input_ring()
76 nitrox_write_csr(ndev, offset, pkt_in_ctl.value); in reset_pkt_input_ring()
[all …]
/openbmc/qemu/hw/net/fsl_etsec/
H A Detsec.c58 uint32_t ievent = etsec->regs[IEVENT].value; in etsec_update_irq()
59 uint32_t imask = etsec->regs[IMASK].value; in etsec_update_irq()
98 ret = reg->value; in etsec_read()
112 uint32_t value) in write_tstat() argument
118 if (value & (1 << (31 - i))) { in write_tstat()
124 reg->value &= ~value; in write_tstat()
130 uint32_t value) in write_rstat() argument
136 if (value & (1 << (23 - i)) && !(reg->value & (1 << (23 - i)))) { in write_rstat()
142 reg->value &= ~value; in write_rstat()
148 uint32_t value) in write_tbasex() argument
[all …]
/openbmc/u-boot/include/
H A Datmel_hlcdc.h51 #define LCDC_LCDCFG0_CLKDIV(value) \ argument
52 ((LCDC_LCDCFG0_CLKDIV_Msk & ((value) << LCDC_LCDCFG0_CLKDIV_Pos)))
56 #define LCDC_LCDCFG1_HSPW(value) \ argument
57 ((LCDC_LCDCFG1_HSPW_Msk & ((value) << LCDC_LCDCFG1_HSPW_Pos)))
60 #define LCDC_LCDCFG1_VSPW(value) \ argument
61 ((LCDC_LCDCFG1_VSPW_Msk & ((value) << LCDC_LCDCFG1_VSPW_Pos)))
65 #define LCDC_LCDCFG2_VFPW(value) \ argument
66 ((LCDC_LCDCFG2_VFPW_Msk & ((value) << LCDC_LCDCFG2_VFPW_Pos)))
69 #define LCDC_LCDCFG2_VBPW(value) \ argument
70 ((LCDC_LCDCFG2_VBPW_Msk & ((value) << LCDC_LCDCFG2_VBPW_Pos)))
[all …]
/openbmc/linux/tools/testing/selftests/bpf/progs/
H A Dlsm.c18 __type(value, __u64);
25 __type(value, __u64);
32 __type(value, __u64);
39 __type(value, __u64);
46 __type(value, __u64);
53 __type(value, __u64);
60 __type(value, __u64);
116 __u64 *value; in BPF_PROG() local
124 value = bpf_map_lookup_elem(&array, &key); in BPF_PROG()
125 if (value) in BPF_PROG()
[all …]
/openbmc/qemu/hw/rtc/
H A Dtrace-events4 allwinner_rtc_read(uint64_t addr, uint64_t value) "addr 0x%" PRIx64 " value 0x%" PRIx64
5 allwinner_rtc_write(uint64_t addr, uint64_t value) "addr 0x%" PRIx64 " value 0x%" PRIx64
8 sun4v_rtc_read(uint64_t addr, uint64_t value) "read: addr 0x%" PRIx64 " value 0x%" PRIx64
9 sun4v_rtc_write(uint64_t addr, uint64_t value) "write: addr 0x%" PRIx64 " value 0x%" PRIx64
16 pl031_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
17 pl031_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
22 aspeed_rtc_read(uint64_t addr, uint64_t value) "addr 0x%02" PRIx64 " value 0x%08" PRIx64
23 aspeed_rtc_write(uint64_t addr, uint64_t value) "addr 0x%02" PRIx64 " value 0x%08" PRIx64
26 ds1338_recv(uint32_t addr, uint8_t value) "[0x%" PRIx32 "] -> 0x%02" PRIx8
27 ds1338_send(uint32_t addr, uint8_t value) "[0x%" PRIx32 "] <- 0x%02" PRIx8
[all …]
/openbmc/linux/drivers/pinctrl/tegra/
H A Dpinctrl-tegra-xusb.c96 static inline void padctl_writel(struct tegra_xusb_padctl *padctl, u32 value, in padctl_writel() argument
99 writel(value, padctl->regs + offset); in padctl_writel()
149 #define TEGRA_XUSB_PADCTL_PACK(param, value) ((param) << 16 | (value)) argument
164 u32 value; in tegra_xusb_padctl_parse_subnode() local
175 err = of_property_read_u32(np, properties[i].name, &value); in tegra_xusb_padctl_parse_subnode()
183 config = TEGRA_XUSB_PADCTL_PACK(properties[i].param, value); in tegra_xusb_padctl_parse_subnode()
304 u32 value; in tegra_xusb_padctl_pinmux_set() local
315 value = padctl_readl(padctl, lane->offset); in tegra_xusb_padctl_pinmux_set()
316 value &= ~(lane->mask << lane->shift); in tegra_xusb_padctl_pinmux_set()
317 value |= i << lane->shift; in tegra_xusb_padctl_pinmux_set()
[all …]
/openbmc/linux/drivers/gpu/drm/tegra/
H A Dtrace.h11 TP_PROTO(struct device *dev, unsigned int offset, u32 value),
12 TP_ARGS(dev, offset, value),
16 __field(u32, value)
21 __entry->value = value;
24 __entry->value)
28 TP_PROTO(struct device *dev, unsigned int offset, u32 value),
29 TP_ARGS(dev, offset, value));
31 TP_PROTO(struct device *dev, unsigned int offset, u32 value),
32 TP_ARGS(dev, offset, value));
35 TP_PROTO(struct device *dev, unsigned int offset, u32 value),
[all …]
/openbmc/linux/tools/perf/util/
H A Dconfig.c76 static char value[1024]; in parse_value() local
83 if (len >= sizeof(value) - 1) in parse_value()
88 value[len] = 0; in parse_value()
89 return value; in parse_value()
105 value[len++] = ' '; in parse_value()
129 value[len++] = c; in parse_value()
136 value[len++] = c; in parse_value()
148 char *value; in get_value() local
165 value = NULL; in get_value()
169 value = parse_value(); in get_value()
[all …]
/openbmc/linux/drivers/gpu/drm/i915/display/
H A Ddvo_ns2501.c196 u8 value; member
301 [0] = { .offset = 0x0a, .value = 0x81, },
303 [1] = { .offset = 0x12, .value = 0x02, },
304 [2] = { .offset = 0x18, .value = 0x07, },
305 [3] = { .offset = 0x19, .value = 0x00, },
306 [4] = { .offset = 0x1a, .value = 0x00, }, /* PLL?, ignored */
308 [5] = { .offset = 0x1e, .value = 0x02, },
309 [6] = { .offset = 0x1f, .value = 0x40, },
310 [7] = { .offset = 0x20, .value = 0x00, },
311 [8] = { .offset = 0x21, .value = 0x00, },
[all …]
/openbmc/linux/arch/x86/pci/
H A Dce4100.c25 u32 value; member
33 void (*read)(struct sim_dev_reg *reg, u32 *value);
34 void (*write)(struct sim_dev_reg *reg, u32 value);
40 void (*read)(struct sim_dev_reg *reg, u32 value);
41 void (*write)(struct sim_dev_reg *reg, u32 value);
58 &reg->sim_reg.value); in reg_init()
61 static void reg_read(struct sim_dev_reg *reg, u32 *value) in reg_read() argument
63 *value = reg->sim_reg.value; in reg_read()
66 static void reg_write(struct sim_dev_reg *reg, u32 value) in reg_write() argument
68 reg->sim_reg.value = (value & reg->sim_reg.mask) | in reg_write()
[all …]
/openbmc/linux/arch/mips/kernel/
H A Dunaligned.c114 unsigned long origpc, orig31, value; in emulate_load_store_insn() local
172 LoadW(addr, value, res); in emulate_load_store_insn()
176 regs->regs[insn.mxu_lx_format.rd] = value; in emulate_load_store_insn()
181 LoadHW(addr, value, res); in emulate_load_store_insn()
185 regs->regs[insn.dsp_format.rd] = value; in emulate_load_store_insn()
190 LoadHWU(addr, value, res); in emulate_load_store_insn()
194 regs->regs[insn.dsp_format.rd] = value; in emulate_load_store_insn()
210 LoadW(addr, value, res); in emulate_load_store_insn()
214 regs->regs[insn.dsp_format.rd] = value; in emulate_load_store_insn()
219 LoadHW(addr, value, res); in emulate_load_store_insn()
[all …]
/openbmc/linux/drivers/net/ethernet/stmicro/stmmac/
H A Ddwmac1000_core.c27 u32 value = readl(ioaddr + GMAC_CONTROL); in dwmac1000_core_init() local
31 value |= GMAC_CORE_INIT; in dwmac1000_core_init()
34 value |= GMAC_CONTROL_2K; in dwmac1000_core_init()
36 value |= GMAC_CONTROL_JE; in dwmac1000_core_init()
39 value |= GMAC_CONTROL_TE; in dwmac1000_core_init()
41 value &= ~hw->link.speed_mask; in dwmac1000_core_init()
44 value |= hw->link.speed1000; in dwmac1000_core_init()
47 value |= hw->link.speed100; in dwmac1000_core_init()
50 value |= hw->link.speed10; in dwmac1000_core_init()
55 writel(value, ioaddr + GMAC_CONTROL); in dwmac1000_core_init()
[all …]
H A Ddwmac4_lib.c18 u32 value = readl(ioaddr + DMA_BUS_MODE); in dwmac4_dma_reset() local
21 value |= DMA_BUS_MODE_SFT_RESET; in dwmac4_dma_reset()
22 writel(value, ioaddr + DMA_BUS_MODE); in dwmac4_dma_reset()
24 return readl_poll_timeout(ioaddr + DMA_BUS_MODE, value, in dwmac4_dma_reset()
25 !(value & DMA_BUS_MODE_SFT_RESET), in dwmac4_dma_reset()
49 u32 value = readl(ioaddr + DMA_CHAN_TX_CONTROL(dwmac4_addrs, chan)); in dwmac4_dma_start_tx() local
51 value |= DMA_CONTROL_ST; in dwmac4_dma_start_tx()
52 writel(value, ioaddr + DMA_CHAN_TX_CONTROL(dwmac4_addrs, chan)); in dwmac4_dma_start_tx()
54 value = readl(ioaddr + GMAC_CONFIG); in dwmac4_dma_start_tx()
55 value |= GMAC_CONFIG_TE; in dwmac4_dma_start_tx()
[all …]
/openbmc/linux/arch/alpha/kernel/
H A Dmodule.c156 unsigned long value, hi, lo; in apply_relocate_add() local
165 value = sym->st_value + rela[i].r_addend; in apply_relocate_add()
171 *(u32 *)location = value; in apply_relocate_add()
175 ((u32 *)location)[0] = value; in apply_relocate_add()
176 ((u32 *)location)[1] = value >> 32; in apply_relocate_add()
179 value -= gp; in apply_relocate_add()
180 if ((int)value != value) in apply_relocate_add()
182 *(u32 *)location = value; in apply_relocate_add()
190 *(u64 *)hi = value; in apply_relocate_add()
195 value = gp - (u64)location; in apply_relocate_add()
[all …]
/openbmc/linux/drivers/spi/
H A Dspi-gxp.c52 u8 value; in gxp_spi_set_mode() local
55 value = readb(reg_base + OFFSET_SPIMCTRL); in gxp_spi_set_mode()
60 value &= ~0x30; in gxp_spi_set_mode()
62 value |= 0x30; in gxp_spi_set_mode()
64 writeb(value, reg_base + OFFSET_SPIMCTRL); in gxp_spi_set_mode()
72 u32 value; in gxp_spi_read_reg() local
74 value = readl(reg_base + OFFSET_SPIMCFG); in gxp_spi_read_reg()
75 value &= ~(1 << 24); in gxp_spi_read_reg()
76 value |= (chip->cs << 24); in gxp_spi_read_reg()
77 value &= ~(0x07 << 16); in gxp_spi_read_reg()
[all …]
/openbmc/linux/drivers/accel/habanalabs/goya/
H A Dgoya_hwmgr.c42 long value; in mme_clk_show() local
47 value = hl_fw_get_frequency(hdev, HL_GOYA_MME_PLL, false); in mme_clk_show()
49 if (value < 0) in mme_clk_show()
50 return value; in mme_clk_show()
52 return sprintf(buf, "%lu\n", value); in mme_clk_show()
61 long value; in mme_clk_store() local
73 rc = kstrtoul(buf, 0, &value); in mme_clk_store()
80 hl_fw_set_frequency(hdev, HL_GOYA_MME_PLL, value); in mme_clk_store()
81 goya->mme_clk = value; in mme_clk_store()
91 long value; in tpc_clk_show() local
[all …]
/openbmc/openbmc-test-automation/openpower/ras/
H A Dtest_host_boot_ras.robot35 ${value}= Get From Dictionary ${ERROR_INJECT_DICT} MCACALIFIR_RECV1
38 Inject Error At HOST Boot Path ${value[0]} ${value[1]}
39 ... ${value[2]} ${err_log_path}
48 ${value}= Get From Dictionary ${ERROR_INJECT_DICT} MCI_RECV1
51 Inject Error At HOST Boot Path ${value[0]} ${value[1]}
52 ... ${value[2]} ${err_log_path}
60 ${value}= Get From Dictionary ${ERROR_INJECT_DICT} NX_RECV1
63 Inject Error At HOST Boot Path ${value[0]} ${value[1]}
64 ... ${value[2]} ${err_log_path}
74 ${value}= Get From Dictionary ${ERROR_INJECT_DICT} L2FIR_RECV1
[all …]
/openbmc/linux/kernel/bpf/
H A Dtnum.c12 #define TNUM(_v, _m) (struct tnum){.value = _v, .mask = _m}
14 const struct tnum tnum_unknown = { .value = 0, .mask = -1 };
16 struct tnum tnum_const(u64 value) in tnum_const() argument
18 return TNUM(value, 0); in tnum_const()
39 return TNUM(a.value << shift, a.mask << shift); in tnum_lshift()
44 return TNUM(a.value >> shift, a.mask >> shift); in tnum_rshift()
55 return TNUM((u32)(((s32)a.value) >> min_shift), in tnum_arshift()
58 return TNUM((s64)a.value >> min_shift, in tnum_arshift()
67 sv = a.value + b.value; in tnum_add()
78 dv = a.value - b.value; in tnum_sub()
[all …]
/openbmc/linux/drivers/iio/magnetometer/
H A Dst_magn_core.c156 { .hz = 1, .value = 0x00 },
157 { .hz = 2, .value = 0x01 },
158 { .hz = 3, .value = 0x02 },
159 { .hz = 8, .value = 0x03 },
160 { .hz = 15, .value = 0x04 },
161 { .hz = 30, .value = 0x05 },
162 { .hz = 75, .value = 0x06 },
178 .value = 0x01,
184 .value = 0x02,
190 .value = 0x03,
[all …]
/openbmc/linux/drivers/staging/sm750fb/
H A Dddk750_hwi2c.c14 unsigned int value; in sm750_hw_i2c_init() local
17 value = peek32(GPIO_MUX); in sm750_hw_i2c_init()
19 value |= (GPIO_MUX_30 | GPIO_MUX_31); in sm750_hw_i2c_init()
20 poke32(GPIO_MUX, value); in sm750_hw_i2c_init()
29 value = peek32(I2C_CTRL) & ~(I2C_CTRL_MODE | I2C_CTRL_EN); in sm750_hw_i2c_init()
31 value |= I2C_CTRL_MODE; in sm750_hw_i2c_init()
32 value |= I2C_CTRL_EN; in sm750_hw_i2c_init()
33 poke32(I2C_CTRL, value); in sm750_hw_i2c_init()
40 unsigned int value; in sm750_hw_i2c_close() local
43 value = peek32(I2C_CTRL) & ~I2C_CTRL_EN; in sm750_hw_i2c_close()
[all …]
/openbmc/openbmc/poky/bitbake/lib/bb/
H A DCOW.py54 def __setitem__(cls, key, value): argument
55 if value is not None and not isinstance(value, ImmutableTypes):
56 if not isinstance(value, COWMeta):
59 setattr(cls, key, value)
68 value = getattr(cls, nkey)
70 return value
72 if not cls.__warn__ is False and not isinstance(value, COWMeta):
75 value = value.copy()
77 value = copy.copy(value)
78 setattr(cls, nkey, value)
[all …]

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