/openbmc/linux/arch/sh/drivers/pci/ |
H A D | ops-sh4.c | 65 int shift; in sh4_pci_write() local 75 shift = (where & 3) << 3; in sh4_pci_write() 76 data &= ~(0xff << shift); in sh4_pci_write() 77 data |= ((val & 0xff) << shift); in sh4_pci_write() 80 shift = (where & 2) << 3; in sh4_pci_write() 81 data &= ~(0xffff << shift); in sh4_pci_write() 82 data |= ((val & 0xffff) << shift); in sh4_pci_write()
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/openbmc/linux/drivers/clk/mxs/ |
H A D | clk.h | 19 int mxs_clk_wait(void __iomem *reg, u8 shift); 28 void __iomem *reg, u8 shift, u8 width, u8 busy); 31 void __iomem *reg, u8 shift, u8 width, u8 busy); 39 const char *parent_name, void __iomem *reg, u8 shift) in mxs_clk_gate() argument 42 reg, shift, CLK_GATE_SET_TO_DISABLE, in mxs_clk_gate() 47 u8 shift, u8 width, const char *const *parent_names, int num_parents) in mxs_clk_mux() argument 51 reg, shift, width, 0, &mxs_lock); in mxs_clk_mux()
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/openbmc/linux/sound/pci/ac97/ |
H A D | ac97_patch.h | 10 #define AC97_SINGLE_VALUE(reg,shift,mask,invert) \ argument 11 ((reg) | ((shift) << 8) | ((shift) << 12) | ((mask) << 16) | \ 13 #define AC97_PAGE_SINGLE_VALUE(reg,shift,mask,invert,page) \ argument 14 (AC97_SINGLE_VALUE(reg,shift,mask,invert) | (1<<25) | ((page) << 26)) 15 #define AC97_SINGLE(xname, reg, shift, mask, invert) \ argument 19 .private_value = AC97_SINGLE_VALUE(reg, shift, mask, invert) } 20 #define AC97_PAGE_SINGLE(xname, reg, shift, mask, invert, page) \ argument 24 .private_value = AC97_PAGE_SINGLE_VALUE(reg, shift, mask, invert, page) }
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/openbmc/linux/drivers/gpu/drm/amd/display/dmub/src/ |
H A D | dmub_reg.c | 36 uint32_t value, uint32_t mask, uint8_t shift) in set_reg_field_value_masks() argument 39 (field_value_mask->value & ~mask) | (mask & (value << shift)); in set_reg_field_value_masks() 48 uint32_t shift, mask, field_value; in set_reg_field_values() local 56 shift = va_arg(ap, uint32_t); in set_reg_field_values() 61 shift); in set_reg_field_values() 67 uint8_t shift) in get_reg_field_value_ex() argument 69 return (mask & reg_value) >> shift; in get_reg_field_value_ex() 104 void dmub_reg_get(struct dmub_srv *srv, uint32_t addr, uint8_t shift, in dmub_reg_get() argument 108 *field_value = get_reg_field_value_ex(reg_val, mask, shift); in dmub_reg_get()
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/openbmc/qemu/pc-bios/keymaps/ |
H A D | lv | 44 at 0x03 shift 117 Q 0x10 shift 121 W 0x11 shift 125 E 0x12 shift 131 R 0x13 shift 137 T 0x14 shift 141 Y 0x15 shift 145 U 0x16 shift 151 I 0x17 shift 157 O 0x18 shift [all …]
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H A D | fi | 115 Q 0x10 shift 119 W 0x11 shift 123 E 0x12 shift 128 R 0x13 shift 132 T 0x14 shift 138 Y 0x15 shift 142 U 0x16 shift 146 I 0x17 shift 152 O 0x18 shift 158 P 0x19 shift [all …]
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/openbmc/linux/include/linux/ |
H A D | math64.h | 166 return (u64)(((unsigned __int128)a * mul) >> shift); in mul_u64_u32_shr() 173 return (u64)(((unsigned __int128)a * mul) >> shift); in mul_u64_u64_shr() 188 ret = mul_u32_u32(al, mul) >> shift; in mul_u64_u32_shr() 190 ret += mul_u32_u32(ah, mul) << (32 - shift); in mul_u64_u32_shr() 197 static inline u64 mul_u64_u64_shr(u64 a, u64 b, unsigned int shift) in mul_u64_u64_shr() argument 232 if (shift == 0) in mul_u64_u64_shr() 234 if (shift < 64) in mul_u64_u64_shr() 235 return (rl.ll >> shift) | (rh.ll << (64 - shift)); in mul_u64_u64_shr() 236 return rh.ll >> (shift & 63); in mul_u64_u64_shr() 243 static inline u64 mul_s64_u64_shr(s64 a, u64 b, unsigned int shift) in mul_s64_u64_shr() argument [all …]
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H A D | clk-provider.h | 682 u8 shift; member 739 void __iomem *reg, u8 shift, u8 width, 757 (reg), (shift), (width), \ 809 reg, shift, width, \ argument 849 reg, shift, width, \ argument 870 flags, reg, shift, width, \ argument 907 reg, shift, width, \ argument 928 reg, shift, width, \ argument 972 u8 shift; member 1039 flags, reg, shift, width, \ argument [all …]
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H A D | t10-pi.h | 42 unsigned int shift = ilog2(queue_logical_block_size(rq->q)); in t10_pi_ref_tag() local 46 shift = rq->q->integrity.interval_exp; in t10_pi_ref_tag() 48 return blk_rq_pos(rq) >> (shift - SECTOR_SHIFT) & 0xffffffff; in t10_pi_ref_tag() 73 unsigned int shift = ilog2(queue_logical_block_size(rq->q)); in ext_pi_ref_tag() local 77 shift = rq->q->integrity.interval_exp; in ext_pi_ref_tag() 79 return lower_48_bits(blk_rq_pos(rq) >> (shift - SECTOR_SHIFT)); in ext_pi_ref_tag()
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/openbmc/linux/drivers/clk/meson/ |
H A D | gxbb.c | 97 .shift = 0, 102 .shift = 9, 107 .shift = 0, 134 .shift = 16, 270 .shift = 16, 288 .shift = 22, 306 .shift = 18, 324 .shift = 21, 342 .shift = 23, 360 .shift = 19, [all …]
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H A D | g12a-aoclk.c | 125 .shift = 0, 130 .shift = 12, 135 .shift = 0, 164 .shift = 24, 216 .shift = 0, 226 .shift = 0, 255 .shift = 24, 290 .shift = 10, 309 .shift = 8, 328 .shift = 9, [all …]
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H A D | a1-pll.c | 23 .shift = 28, 28 .shift = 0, 33 .shift = 10, 38 .shift = 0, 43 .shift = 31, 48 .shift = 29, 94 .shift = 28, 99 .shift = 0, 104 .shift = 10, 109 .shift = 0, [all …]
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H A D | g12a.c | 36 .shift = 28, 41 .shift = 0, 46 .shift = 10, 51 .shift = 0, 56 .shift = 31, 61 .shift = 29, 78 .shift = 16, 145 .shift = 16, 204 .shift = 16, 359 .shift = 0, [all …]
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/openbmc/linux/drivers/gpu/drm/nouveau/nvkm/subdev/gpio/ |
H A D | nv50.c | 58 nv50_gpio_location(int line, u32 *reg, u32 *shift) in nv50_gpio_location() argument 66 *shift = (line & 7) << 2; in nv50_gpio_location() 74 u32 reg, shift; in nv50_gpio_drive() local 76 if (nv50_gpio_location(line, ®, &shift)) in nv50_gpio_drive() 79 nvkm_mask(device, reg, 3 << shift, (((dir ^ 1) << 1) | out) << shift); in nv50_gpio_drive() 87 u32 reg, shift; in nv50_gpio_sense() local 89 if (nv50_gpio_location(line, ®, &shift)) in nv50_gpio_sense() 92 return !!(nvkm_rd32(device, reg) & (4 << shift)); in nv50_gpio_sense()
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/openbmc/linux/drivers/clk/ti/ |
H A D | autoidle.c | 21 u8 shift; member 124 val &= ~(1 << clk->shift); in _allow_autoidle() 126 val |= (1 << clk->shift); in _allow_autoidle() 138 val |= (1 << clk->shift); in _deny_autoidle() 140 val &= ~(1 << clk->shift); in _deny_autoidle() 186 u32 shift; in of_ti_clk_autoidle_setup() local 191 if (of_property_read_u32(node, "ti,autoidle-shift", &shift)) in of_ti_clk_autoidle_setup() 199 clk->shift = shift; in of_ti_clk_autoidle_setup()
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/openbmc/linux/drivers/clk/sunxi-ng/ |
H A D | ccu_nkmp.c | 102 n = reg >> nkmp->n.shift; in ccu_nkmp_recalc_rate() 108 k = reg >> nkmp->k.shift; in ccu_nkmp_recalc_rate() 114 m = reg >> nkmp->m.shift; in ccu_nkmp_recalc_rate() 120 p = reg >> nkmp->p.shift; in ccu_nkmp_recalc_rate() 193 n_mask = GENMASK(nkmp->n.width + nkmp->n.shift - 1, in ccu_nkmp_set_rate() 194 nkmp->n.shift); in ccu_nkmp_set_rate() 196 k_mask = GENMASK(nkmp->k.width + nkmp->k.shift - 1, in ccu_nkmp_set_rate() 197 nkmp->k.shift); in ccu_nkmp_set_rate() 200 nkmp->m.shift); in ccu_nkmp_set_rate() 203 nkmp->p.shift); in ccu_nkmp_set_rate() [all …]
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/openbmc/linux/drivers/infiniband/hw/hns/ |
H A D | hns_roce_common.h | 42 #define roce_get_field(origin, mask, shift) \ argument 43 ((le32_to_cpu(origin) & (mask)) >> (u32)(shift)) 45 #define roce_get_bit(origin, shift) \ argument 46 roce_get_field((origin), (1ul << (shift)), (shift)) 48 #define roce_set_field(origin, mask, shift, val) \ argument 52 cpu_to_le32(((u32)(val) << (u32)(shift)) & (mask)); \ 55 #define roce_set_bit(origin, shift, val) \ argument 56 roce_set_field((origin), (1ul << (shift)), (shift), (val))
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/openbmc/linux/drivers/ata/ |
H A D | pata_platform.c | 53 unsigned int shift) in pata_platform_setup_port() argument 56 ioaddr->data_addr = ioaddr->cmd_addr + (ATA_REG_DATA << shift); in pata_platform_setup_port() 57 ioaddr->error_addr = ioaddr->cmd_addr + (ATA_REG_ERR << shift); in pata_platform_setup_port() 58 ioaddr->feature_addr = ioaddr->cmd_addr + (ATA_REG_FEATURE << shift); in pata_platform_setup_port() 59 ioaddr->nsect_addr = ioaddr->cmd_addr + (ATA_REG_NSECT << shift); in pata_platform_setup_port() 60 ioaddr->lbal_addr = ioaddr->cmd_addr + (ATA_REG_LBAL << shift); in pata_platform_setup_port() 61 ioaddr->lbam_addr = ioaddr->cmd_addr + (ATA_REG_LBAM << shift); in pata_platform_setup_port() 62 ioaddr->lbah_addr = ioaddr->cmd_addr + (ATA_REG_LBAH << shift); in pata_platform_setup_port() 63 ioaddr->device_addr = ioaddr->cmd_addr + (ATA_REG_DEVICE << shift); in pata_platform_setup_port() 64 ioaddr->status_addr = ioaddr->cmd_addr + (ATA_REG_STATUS << shift); in pata_platform_setup_port() [all …]
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/openbmc/linux/drivers/clk/sprd/ |
H A D | sc9860-clk.c | 131 { .shift = 0, .width = 0 }, /* refin */ 133 { .shift = 0, .width = 7 }, /* n */ 148 { .shift = 0, .width = 0 }, /* refin */ 150 { .shift = 0, .width = 7 }, /* n */ 164 { .shift = 0, .width = 0 }, /* refin */ 166 { .shift = 0, .width = 7 }, /* n */ 185 { .shift = 16, .width = 7 }, /* n */ 204 { .shift = 0, .width = 7 }, /* n */ 220 { .shift = 0, .width = 7 }, /* n */ 240 { .shift = 0, .width = 7 }, /* n */ [all …]
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/openbmc/u-boot/include/linux/ |
H A D | math64.h | 150 static inline u64 mul_u64_u32_shr(u64 a, u32 mul, unsigned int shift) in mul_u64_u32_shr() argument 152 return (u64)(((unsigned __int128)a * mul) >> shift); in mul_u64_u32_shr() 157 static inline u64 mul_u64_u64_shr(u64 a, u64 mul, unsigned int shift) in mul_u64_u64_shr() argument 159 return (u64)(((unsigned __int128)a * mul) >> shift); in mul_u64_u64_shr() 174 ret = mul_u32_u32(al, mul) >> shift; in mul_u64_u32_shr() 176 ret += mul_u32_u32(ah, mul) << (32 - shift); in mul_u64_u32_shr() 183 static inline u64 mul_u64_u64_shr(u64 a, u64 b, unsigned int shift) in mul_u64_u64_shr() argument 218 if (shift == 0) in mul_u64_u64_shr() 220 if (shift < 64) in mul_u64_u64_shr() 221 return (rl.ll >> shift) | (rh.ll << (64 - shift)); in mul_u64_u64_shr() [all …]
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/openbmc/linux/drivers/net/usb/ |
H A D | r8153_ecm.c | 15 u8 shift = index & 2; in pla_read_word() local 19 if (shift) in pla_read_word() 20 byen <<= shift; in pla_read_word() 30 ret >>= (shift * 8); in pla_read_word() 41 u8 shift = index & 2; in pla_write_word() local 47 if (shift) { in pla_write_word() 48 byen <<= shift; in pla_write_word() 49 mask <<= (shift * 8); in pla_write_word() 50 data <<= (shift * 8); in pla_write_word()
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/openbmc/linux/drivers/clk/qcom/ |
H A D | clk-krait.c | 38 regval &= ~(mux->mask << mux->shift); in __krait_mux_set_sel() 39 regval |= (sel & mux->mask) << mux->shift; in __krait_mux_set_sel() 41 regval &= ~(mux->mask << (mux->shift + LPL_SHIFT)); in __krait_mux_set_sel() 42 regval |= (sel & mux->mask) << (mux->shift + LPL_SHIFT); in __krait_mux_set_sel() 85 sel >>= mux->shift; in krait_mux_get_parent() 116 mask = mask << (d->shift + LPL_SHIFT) | mask << d->shift; in krait_div2_set_rate() 118 mask <<= d->shift; in krait_div2_set_rate() 137 div >>= d->shift; in krait_div2_recalc_rate()
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/openbmc/u-boot/arch/arm/dts/ |
H A D | am35xx-clocks.dtsi | 16 ti,bit-shift = <1>; 24 ti,bit-shift = <9>; 32 ti,bit-shift = <2>; 40 ti,bit-shift = <10>; 48 ti,bit-shift = <0>; 56 ti,bit-shift = <8>; 64 ti,bit-shift = <3>; 73 ti,bit-shift = <4>; 93 ti,bit-shift = <23>; 101 ti,bit-shift = <23>;
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/openbmc/linux/arch/arm/boot/dts/ti/omap/ |
H A D | am35xx-clocks.dtsi | 13 ti,bit-shift = <1>; 21 ti,bit-shift = <9>; 29 ti,bit-shift = <2>; 37 ti,bit-shift = <10>; 45 ti,bit-shift = <0>; 53 ti,bit-shift = <8>; 61 ti,bit-shift = <3>; 76 ti,bit-shift = <4>; 84 ti,bit-shift = <23>; 111 ti,bit-shift = <23>;
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/openbmc/linux/drivers/gpu/drm/nouveau/nvif/ |
H A D | vmm.c | 109 u8 shift) in nvif_vmm_raw_get() argument 116 .shift = shift, in nvif_vmm_raw_get() 124 nvif_vmm_raw_put(struct nvif_vmm *vmm, u64 addr, u64 size, u8 shift) in nvif_vmm_raw_put() argument 131 .shift = shift, in nvif_vmm_raw_put() 139 nvif_vmm_raw_map(struct nvif_vmm *vmm, u64 addr, u64 size, u8 shift, in nvif_vmm_raw_map() argument 147 .shift = shift, in nvif_vmm_raw_map() 161 u8 shift, bool sparse) in nvif_vmm_raw_unmap() argument 168 .shift = shift, in nvif_vmm_raw_unmap() 251 vmm->page[i].shift = args.shift; in nvif_vmm_ctor()
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