/openbmc/u-boot/drivers/clk/at91/ |
H A D | clk-peripheral.c | 54 static int periph_clk_enable(struct clk *clk) in periph_clk_enable() argument 56 struct pmc_platdata *plat = dev_get_platdata(clk->dev); in periph_clk_enable() 61 if (clk->id < PERIPHERAL_ID_MIN) in periph_clk_enable() 64 clk_type = dev_get_driver_data(dev_get_parent(clk->dev)); in periph_clk_enable() 67 if (clk->id > PERIPHERAL_ID_MAX) in periph_clk_enable() 70 setbits_le32(addr, PERIPHERAL_MASK(clk->id)); in periph_clk_enable() 72 writel(clk->id & AT91_PMC_PCR_PID_MASK, &pmc->pcr); in periph_clk_enable() 80 static ulong periph_get_rate(struct clk *clk) in periph_get_rate() argument 83 struct clk clk_dev; in periph_get_rate() 87 dev = dev_get_parent(clk->dev); in periph_get_rate()
|
/openbmc/linux/scripts/gdb/linux/ |
H A D | clk.py | 29 def show_subtree(self, clk, level): argument 33 clk['name'].string(), 34 clk['enable_count'], 35 clk['prepare_count'], 36 clk['protect_count'], 37 clk['rate'], 40 for child in clk_core_for_each_child(clk['children']): 49 for clk in clk_core_for_each_child(gdb.parse_and_eval("clk_root_list")): 50 self.show_subtree(clk, 0) 51 for clk in clk_core_for_each_child(gdb.parse_and_eval("clk_orphan_list")): [all …]
|
/openbmc/linux/drivers/clk/uniphier/ |
H A D | Makefile | 2 obj-y += clk-uniphier-core.o 4 obj-y += clk-uniphier-cpugear.o 5 obj-y += clk-uniphier-fixed-factor.o 6 obj-y += clk-uniphier-fixed-rate.o 7 obj-y += clk-uniphier-gate.o 8 obj-y += clk-uniphier-mux.o 10 obj-y += clk-uniphier-sys.o 11 obj-y += clk-uniphier-mio.o 12 obj-y += clk-uniphier-peri.o
|
/openbmc/linux/drivers/clocksource/ |
H A D | timer-lpc32xx.c | 159 struct clk *clk; in lpc32xx_clocksource_init() local 163 if (IS_ERR(clk)) { in lpc32xx_clocksource_init() 165 return PTR_ERR(clk); in lpc32xx_clocksource_init() 192 rate = clk_get_rate(clk); in lpc32xx_clocksource_init() 210 clk_disable_unprepare(clk); in lpc32xx_clocksource_init() 212 clk_put(clk); in lpc32xx_clocksource_init() 220 struct clk *clk; in lpc32xx_clockevent_init() local 224 if (IS_ERR(clk)) { in lpc32xx_clockevent_init() 226 return PTR_ERR(clk); in lpc32xx_clockevent_init() 258 rate = clk_get_rate(clk); in lpc32xx_clockevent_init() [all …]
|
H A D | armv7m_systick.c | 27 struct clk *clk = NULL; in system_timer_of_register() local 40 clk = of_clk_get(np, 0); in system_timer_of_register() 41 if (IS_ERR(clk)) { in system_timer_of_register() 42 ret = PTR_ERR(clk); in system_timer_of_register() 46 ret = clk_prepare_enable(clk); in system_timer_of_register() 50 rate = clk_get_rate(clk); in system_timer_of_register() 64 if (clk) in system_timer_of_register() 75 clk_disable_unprepare(clk); in system_timer_of_register() 77 clk_put(clk); in system_timer_of_register()
|
/openbmc/linux/arch/sh/kernel/cpu/sh2a/ |
H A D | clock-sh7269.c | 26 static struct clk r_clk = { 34 static struct clk extal_clk = { 38 static unsigned long pll_recalc(struct clk *clk) in pll_recalc() argument 40 return clk->parent->rate * PLL_RATE; in pll_recalc() 47 static struct clk pll_clk = { 53 static unsigned long peripheral0_recalc(struct clk *clk) in peripheral0_recalc() argument 55 return clk->parent->rate / 8; in peripheral0_recalc() 68 static unsigned long peripheral1_recalc(struct clk *clk) in peripheral1_recalc() argument 70 return clk->parent->rate / 4; in peripheral1_recalc() 83 struct clk *main_clks[] = { [all …]
|
/openbmc/u-boot/drivers/clk/ |
H A D | clk_bcm6345.c | 21 static int bcm6345_clk_enable(struct clk *clk) in bcm6345_clk_enable() argument 23 struct bcm6345_clk_priv *priv = dev_get_priv(clk->dev); in bcm6345_clk_enable() 25 if (clk->id >= MAX_CLKS) in bcm6345_clk_enable() 28 setbits_be32(priv->regs, BIT(clk->id)); in bcm6345_clk_enable() 33 static int bcm6345_clk_disable(struct clk *clk) in bcm6345_clk_disable() argument 35 struct bcm6345_clk_priv *priv = dev_get_priv(clk->dev); in bcm6345_clk_disable() 37 if (clk->id >= MAX_CLKS) in bcm6345_clk_disable() 40 clrbits_be32(priv->regs, BIT(clk->id)); in bcm6345_clk_disable()
|
/openbmc/linux/drivers/gpu/drm/nouveau/nvkm/engine/device/ |
H A D | ctrl.c | 40 struct nvkm_clk *clk = ctrl->device->clk; in nvkm_control_mthd_pstate_info() local 50 if (clk) { in nvkm_control_mthd_pstate_info() 51 args->v0.count = clk->state_nr; in nvkm_control_mthd_pstate_info() 52 args->v0.ustate_ac = clk->ustate_ac; in nvkm_control_mthd_pstate_info() 54 args->v0.pwrsrc = clk->pwrsrc; in nvkm_control_mthd_pstate_info() 55 args->v0.pstate = clk->pstate; in nvkm_control_mthd_pstate_info() 73 struct nvkm_clk *clk = ctrl->device->clk; in nvkm_control_mthd_pstate_attr() local 86 if (!clk) in nvkm_control_mthd_pstate_attr() 94 domain = clk->domains; in nvkm_control_mthd_pstate_attr() 146 struct nvkm_clk *clk = ctrl->device->clk; in nvkm_control_mthd_pstate_user() local [all …]
|
/openbmc/u-boot/arch/arm/dts/ |
H A D | socfpga.dtsi | 302 clk-gate = <0x60 0>; 317 clk-gate = <0x60 1>; 332 clk-gate = <0x60 2>; 340 clk-gate = <0x60 3>; 348 clk-gate = <0x60 4>; 356 clk-gate = <0x60 5>; 364 clk-gate = <0x60 6>; 371 clk-gate = <0x60 7>; 378 clk-gate = <0x60 8>; 385 clk-gate = <0x60 9>; [all …]
|
H A D | fsl-imx8dx.dtsi | 108 clk: clk { label 411 <&clk IMX8QXP_SDHC0_CLK>, 414 assigned-clocks = <&clk IMX8QXP_SDHC0_SEL>, <&clk IMX8QXP_SDHC0_DIV>; 432 assigned-clocks = <&clk IMX8QXP_SDHC1_SEL>, <&clk IMX8QXP_SDHC1_DIV>; 450 assigned-clocks = <&clk IMX8QXP_SDHC2_SEL>, <&clk IMX8QXP_SDHC2_DIV>; 464 clocks = <&clk IMX8QXP_ENET0_IPG_CLK>, <&clk IMX8QXP_ENET0_AHB_CLK>, 465 <&clk IMX8QXP_ENET0_RGMII_TX_CLK>, <&clk IMX8QXP_ENET0_PTP_CLK>; 467 assigned-clocks = <&clk IMX8QXP_ENET0_REF_DIV>, <&clk IMX8QXP_ENET0_PTP_CLK>; 482 clocks = <&clk IMX8QXP_ENET1_IPG_CLK>, <&clk IMX8QXP_ENET1_AHB_CLK>, 483 <&clk IMX8QXP_ENET1_RGMII_TX_CLK>, <&clk IMX8QXP_ENET1_PTP_CLK>; [all …]
|
/openbmc/linux/drivers/clk/tegra/ |
H A D | clk-tegra30.c | 184 static struct clk **clks; 815 struct clk *clk; in tegra30_pll_init() local 890 struct clk *clk; in tegra30_super_clk_init() local 1003 struct clk *clk; in tegra30_periph_clk_init() local 1043 clks[data->clk_id] = clk; in tegra30_periph_clk_init() 1280 struct clk *clk; in tegra30_clk_src_onecell_get() local 1293 if (IS_ERR(clk)) in tegra30_clk_src_onecell_get() 1294 return clk; in tegra30_clk_src_onecell_get() 1296 hw = __clk_get_hw(clk); in tegra30_clk_src_onecell_get() 1303 return clk; in tegra30_clk_src_onecell_get() [all …]
|
/openbmc/linux/arch/arm64/boot/dts/freescale/ |
H A D | imx8-ss-lsio.dtsi | 171 <&clk IMX_SC_R_FSPI_0 IMX_SC_PM_CLK_PER>; 240 <&clk IMX_SC_R_PWM_0 IMX_SC_PM_CLK_PER>, 241 <&clk IMX_SC_R_PWM_0 IMX_SC_PM_CLK_PER>, 243 <&clk IMX_SC_R_PWM_0 IMX_SC_PM_CLK_PER>; 260 <&clk IMX_SC_R_PWM_1 IMX_SC_PM_CLK_PER>, 261 <&clk IMX_SC_R_PWM_1 IMX_SC_PM_CLK_PER>, 263 <&clk IMX_SC_R_PWM_1 IMX_SC_PM_CLK_PER>; 280 <&clk IMX_SC_R_PWM_2 IMX_SC_PM_CLK_PER>, 281 <&clk IMX_SC_R_PWM_2 IMX_SC_PM_CLK_PER>, 283 <&clk IMX_SC_R_PWM_2 IMX_SC_PM_CLK_PER>; [all …]
|
/openbmc/linux/drivers/cpufreq/ |
H A D | spear-cpufreq.c | 28 struct clk *clk; member 36 struct clk *sys_pclk; in spear1340_cpu_get_possible_parent() 78 struct clk *sys_clk; in spear1340_set_cpu_rate() 81 sys_clk = clk_get_parent(spear_cpufreq.clk); in spear1340_set_cpu_rate() 107 struct clk *srcclk; in spear_cpufreq_target() 133 srcclk = spear_cpufreq.clk; in spear_cpufreq_target() 155 policy->clk = spear_cpufreq.clk; in spear_cpufreq_init() 214 spear_cpufreq.clk = clk_get(NULL, "cpu_clk"); in spear_cpufreq_probe() 215 if (IS_ERR(spear_cpufreq.clk)) { in spear_cpufreq_probe() 217 ret = PTR_ERR(spear_cpufreq.clk); in spear_cpufreq_probe() [all …]
|
/openbmc/linux/drivers/rtc/ |
H A D | rtc-pic32.c | 59 struct clk *clk; member 73 clk_enable(pdata->clk); in pic32_rtc_alarm_clk_enable() 89 clk_enable(pdata->clk); in pic32_rtc_alarmirq() 91 clk_disable(pdata->clk); in pic32_rtc_alarmirq() 103 clk_enable(pdata->clk); in pic32_rtc_setaie() 109 clk_disable(pdata->clk); in pic32_rtc_setaie() 121 clk_enable(pdata->clk); in pic32_rtc_setfreq() 138 clk_enable(pdata->clk); in pic32_rtc_gettime() 178 clk_enable(pdata->clk); in pic32_rtc_settime() 293 pdata->clk = NULL; in pic32_rtc_remove() [all …]
|
/openbmc/linux/arch/arm/boot/dts/intel/socfpga/ |
H A D | socfpga.dtsi | 304 clk-gate = <0x60 0>; 319 clk-gate = <0x60 1>; 334 clk-gate = <0x60 2>; 342 clk-gate = <0x60 3>; 350 clk-gate = <0x60 4>; 358 clk-gate = <0x60 5>; 366 clk-gate = <0x60 6>; 373 clk-gate = <0x60 7>; 380 clk-gate = <0x60 8>; 387 clk-gate = <0x60 9>; [all …]
|
/openbmc/linux/drivers/clk/mxs/ |
H A D | Makefile | 6 obj-y += clk.o clk-pll.o clk-ref.o clk-div.o clk-frac.o clk-ssp.o 8 obj-$(CONFIG_SOC_IMX23) += clk-imx23.o 9 obj-$(CONFIG_SOC_IMX28) += clk-imx28.o
|
/openbmc/linux/arch/sh/kernel/cpu/ |
H A D | clock-cpg.c | 9 static struct clk master_clk = { 14 static struct clk peripheral_clk = { 19 static struct clk bus_clk = { 24 static struct clk cpu_clk = { 32 static struct clk *onchip_clocks[] = { 52 struct clk *clk = onchip_clocks[i]; in cpg_clk_init() local 53 arch_init_clk_ops(&clk->ops, i); in cpg_clk_init() 54 if (clk->ops) in cpg_clk_init() 55 ret |= clk_register(clk); in cpg_clk_init()
|
/openbmc/u-boot/drivers/video/ |
H A D | hitachi_tx18d42vm_lcd.c | 18 static void lcd_panel_spi_write(int cs, int clk, int mosi, in lcd_panel_spi_write() argument 25 gpio_direction_output(clk, 0); in lcd_panel_spi_write() 29 gpio_direction_output(clk, 1); in lcd_panel_spi_write() 48 int i, cs, clk, mosi, ret = 0; in hitachi_tx18d42vm_init() local 51 clk = name_to_gpio(CONFIG_VIDEO_LCD_SPI_SCLK); in hitachi_tx18d42vm_init() 54 if (cs == -1 || clk == -1 || mosi == 1) { in hitachi_tx18d42vm_init() 60 gpio_request(clk, "tx18d42vm-spi-clk") != 0 || in hitachi_tx18d42vm_init() 68 lcd_panel_spi_write(cs, clk, mosi, init_data[i], 16); in hitachi_tx18d42vm_init() 72 lcd_panel_spi_write(cs, clk, mosi, 0x00ad, 16); /* display on */ in hitachi_tx18d42vm_init() 76 gpio_free(clk); in hitachi_tx18d42vm_init()
|
/openbmc/linux/drivers/gpu/host1x/ |
H A D | mipi.c | 91 unsigned long clk; member 124 struct clk *clk; member 153 err = clk_enable(mipi->clk); in tegra_mipi_power_up() 169 clk_disable(mipi->clk); in tegra_mipi_power_up() 179 err = clk_enable(mipi->clk); in tegra_mipi_power_down() 339 u32 clk = 0, data = 0; in tegra_mipi_start_calibration() local 354 tegra_mipi_writel(device->mipi, clk, soc->pads[i].clk); in tegra_mipi_start_calibration() 524 if (IS_ERR(mipi->clk)) { in tegra_mipi_probe() 526 return PTR_ERR(mipi->clk); in tegra_mipi_probe() 529 err = clk_prepare(mipi->clk); in tegra_mipi_probe() [all …]
|
/openbmc/linux/drivers/clk/actions/ |
H A D | Makefile | 2 obj-$(CONFIG_CLK_ACTIONS) += clk-owl.o 4 clk-owl-y += owl-common.o 5 clk-owl-y += owl-gate.o 6 clk-owl-y += owl-mux.o 7 clk-owl-y += owl-divider.o 8 clk-owl-y += owl-factor.o 9 clk-owl-y += owl-composite.o 10 clk-owl-y += owl-pll.o 11 clk-owl-y += owl-reset.o
|
/openbmc/linux/drivers/clk/starfive/ |
H A D | Makefile | 2 obj-$(CONFIG_CLK_STARFIVE_JH71X0) += clk-starfive-jh71x0.o 4 obj-$(CONFIG_CLK_STARFIVE_JH7100) += clk-starfive-jh7100.o 5 obj-$(CONFIG_CLK_STARFIVE_JH7100_AUDIO) += clk-starfive-jh7100-audio.o 7 obj-$(CONFIG_CLK_STARFIVE_JH7110_PLL) += clk-starfive-jh7110-pll.o 8 obj-$(CONFIG_CLK_STARFIVE_JH7110_SYS) += clk-starfive-jh7110-sys.o 9 obj-$(CONFIG_CLK_STARFIVE_JH7110_AON) += clk-starfive-jh7110-aon.o 10 obj-$(CONFIG_CLK_STARFIVE_JH7110_STG) += clk-starfive-jh7110-stg.o 11 obj-$(CONFIG_CLK_STARFIVE_JH7110_ISP) += clk-starfive-jh7110-isp.o 12 obj-$(CONFIG_CLK_STARFIVE_JH7110_VOUT) += clk-starfive-jh7110-vout.o
|
/openbmc/linux/drivers/clk/meson/ |
H A D | clk-cpu-dyndiv.c | 14 meson_clk_cpu_dyndiv_data(struct clk_regmap *clk) in meson_clk_cpu_dyndiv_data() argument 16 return (struct meson_clk_cpu_dyndiv_data *)clk->data; in meson_clk_cpu_dyndiv_data() 22 struct clk_regmap *clk = to_clk_regmap(hw); in meson_clk_cpu_dyndiv_recalc_rate() local 23 struct meson_clk_cpu_dyndiv_data *data = meson_clk_cpu_dyndiv_data(clk); in meson_clk_cpu_dyndiv_recalc_rate() 26 meson_parm_read(clk->map, &data->div), in meson_clk_cpu_dyndiv_recalc_rate() 33 struct clk_regmap *clk = to_clk_regmap(hw); in meson_clk_cpu_dyndiv_determine_rate() local 34 struct meson_clk_cpu_dyndiv_data *data = meson_clk_cpu_dyndiv_data(clk); in meson_clk_cpu_dyndiv_determine_rate() 42 struct clk_regmap *clk = to_clk_regmap(hw); in meson_clk_cpu_dyndiv_set_rate() local 43 struct meson_clk_cpu_dyndiv_data *data = meson_clk_cpu_dyndiv_data(clk); in meson_clk_cpu_dyndiv_set_rate() 54 meson_parm_write(clk->map, &data->dyn, 1); in meson_clk_cpu_dyndiv_set_rate() [all …]
|
/openbmc/linux/drivers/clk/davinci/ |
H A D | pll.c | 245 struct clk *clk; in davinci_pll_div_register() local 273 if (IS_ERR(clk)) { in davinci_pll_div_register() 278 return clk; in davinci_pll_div_register() 572 struct clk * 580 struct clk *clk; in davinci_pll_obsclk_register() local 627 return clk; in davinci_pll_obsclk_register() 676 struct clk * 684 struct clk *clk; in davinci_pll_sysclk_register() local 735 return clk; in davinci_pll_sysclk_register() 755 struct clk *clk; in of_davinci_pll_init() local [all …]
|
/openbmc/linux/drivers/usb/host/ |
H A D | ehci-platform.c | 90 int clk, ret; in ehci_platform_power_on() local 92 for (clk = 0; clk < EHCI_MAX_CLKS && priv->clks[clk]; clk++) { in ehci_platform_power_on() 101 while (--clk >= 0) in ehci_platform_power_on() 111 int clk; in ehci_platform_power_off() local 113 for (clk = EHCI_MAX_CLKS - 1; clk >= 0; clk--) in ehci_platform_power_off() 114 if (priv->clks[clk]) in ehci_platform_power_off() 306 for (clk = 0; clk < EHCI_MAX_CLKS; clk++) { in ehci_platform_probe() 307 priv->clks[clk] = of_clk_get(dev->dev.of_node, clk); in ehci_platform_probe() 391 while (--clk >= 0) in ehci_platform_probe() 407 int clk; in ehci_platform_remove() local [all …]
|
/openbmc/linux/drivers/base/regmap/ |
H A D | regmap-mmio.c | 23 struct clk *clk; member 164 if (!IS_ERR(ctx->clk)) in regmap_mmio_write() 165 clk_disable(ctx->clk); in regmap_mmio_write() 227 if (!IS_ERR(ctx->clk)) in regmap_mmio_noinc_write() 324 if (!IS_ERR(ctx->clk)) in regmap_mmio_read() 378 if (!IS_ERR(ctx->clk)) in regmap_mmio_noinc_read() 392 clk_put(ctx->clk); in regmap_mmio_free_context() 543 clk_put(ctx->clk); in regmap_mmio_gen_context() 590 int regmap_mmio_attach_clk(struct regmap *map, struct clk *clk) in regmap_mmio_attach_clk() argument 594 ctx->clk = clk; in regmap_mmio_attach_clk() [all …]
|