| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn316/ |
| H A D | dcn316_resource.c | 1617 …const int max_usable_det = context->bw_ctx.dml.ip.config_return_buffer_size_in_kbytes - DCN3_16_MI… in dcn316_populate_dml_pipes_from_context()
1667 context->bw_ctx.dml.ip.det_buffer_size_kbytes = in dcn316_populate_dml_pipes_from_context()
1669 if (context->bw_ctx.dml.ip.det_buffer_size_kbytes > DCN3_16_MAX_DET_SIZE) in dcn316_populate_dml_pipes_from_context()
1670 context->bw_ctx.dml.ip.det_buffer_size_kbytes = DCN3_16_MAX_DET_SIZE; in dcn316_populate_dml_pipes_from_context()
1671 ASSERT(context->bw_ctx.dml.ip.det_buffer_size_kbytes >= DCN3_16_DEFAULT_DET_SIZE); in dcn316_populate_dml_pipes_from_context()
1677 context->bw_ctx.dml.ip.det_buffer_size_kbytes = in dcn316_populate_dml_pipes_from_context()
1680 context->bw_ctx.dml.ip.det_buffer_size_kbytes = 192; in dcn316_populate_dml_pipes_from_context()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/core/ |
| H A D | dc.c | 1965 TRACE_DCN_CLOCK_STATE(&context->bw_ctx.bw.dcn.clk); in dc_commit_state_no_check()
1967 TRACE_DCE_CLOCK_STATE(&context->bw_ctx.bw.dce); in dc_commit_state_no_check()
2190 TRACE_DCE_CLOCK_STATE(&context->bw_ctx.bw.dce); in dc_post_update_surfaces_to_stream()
2192 TRACE_DCN_CLOCK_STATE(&context->bw_ctx.bw.dcn.clk); in dc_post_update_surfaces_to_stream()
2222 memcpy(&context->bw_ctx.dml, &dc->dml, sizeof(struct display_mode_lib)); in init_state()
4529 TRACE_DCE_CLOCK_STATE(&context->bw_ctx.bw.dce); in dc_commit_updates_for_stream()
4627 dc->current_state->bw_ctx.dml = *dml; in dc_set_power_state()
4658 info->dppClock = (unsigned int)state->bw_ctx.bw.dcn.clk.dppclk_khz; in get_clock_requirements_for_state()
4659 info->socClock = (unsigned int)state->bw_ctx.bw.dcn.clk.socclk_khz; in get_clock_requirements_for_state()
4661 info->fClock = (unsigned int)state->bw_ctx.bw.dcn.clk.fclk_khz; in get_clock_requirements_for_state()
[all …]
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| H A D | dc_hw_sequencer.c | 799 struct vba_vars_st *vba = &context->bw_ctx.dml.vba; in get_mclk_switch_visual_confirm_color()
812 if (context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching) { in get_mclk_switch_visual_confirm_color()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn315/ |
| H A D | dcn315_resource.c | 1664 …const int max_usable_det = context->bw_ctx.dml.ip.config_return_buffer_size_in_kbytes - DCN3_15_MI… in dcn315_populate_dml_pipes_from_context()
1697 &context->bw_ctx.dml.soc, timing->pix_clk_100hz, bpp, DCN3_15_CRB_SEGMENT_SIZE_KB); in dcn315_populate_dml_pipes_from_context()
1777 context->bw_ctx.dml.ip.det_buffer_size_kbytes = in dcn315_populate_dml_pipes_from_context()
1779 if (context->bw_ctx.dml.ip.det_buffer_size_kbytes > DCN3_15_MAX_DET_SIZE) in dcn315_populate_dml_pipes_from_context()
1780 context->bw_ctx.dml.ip.det_buffer_size_kbytes = DCN3_15_MAX_DET_SIZE; in dcn315_populate_dml_pipes_from_context()
1787 context->bw_ctx.dml.ip.det_buffer_size_kbytes = in dcn315_populate_dml_pipes_from_context()
1793 context->bw_ctx.dml.ip.det_buffer_size_kbytes = 192; in dcn315_populate_dml_pipes_from_context()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/ |
| H A D | dcn201_clk_mgr.c | 91 struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk; in dcn201_update_clocks()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/ |
| H A D | dce112_clk_mgr.c | 197 int patched_disp_clk = context->bw_ctx.bw.dce.dispclk_khz; in dce112_update_clocks()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dce60/ |
| H A D | dce60_resource.c | 881 context->bw_ctx.bw.dce.dispclk_khz = 681000; in dce60_validate_bandwidth()
882 context->bw_ctx.bw.dce.yclk_khz = 250000 * MEMORY_TYPE_MULTIPLIER_CZ; in dce60_validate_bandwidth()
884 context->bw_ctx.bw.dce.dispclk_khz = 0; in dce60_validate_bandwidth()
885 context->bw_ctx.bw.dce.yclk_khz = 0; in dce60_validate_bandwidth()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dce80/ |
| H A D | dce80_resource.c | 888 context->bw_ctx.bw.dce.dispclk_khz = 681000; in dce80_validate_bandwidth()
889 context->bw_ctx.bw.dce.yclk_khz = 250000 * MEMORY_TYPE_MULTIPLIER_CZ; in dce80_validate_bandwidth()
891 context->bw_ctx.bw.dce.dispclk_khz = 0; in dce80_validate_bandwidth()
892 context->bw_ctx.bw.dce.yclk_khz = 0; in dce80_validate_bandwidth()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn31/ |
| H A D | dcn31_resource.c | 1699 context->bw_ctx.dml.ip.det_buffer_size_kbytes = DCN3_1_DEFAULT_DET_SIZE; in dcn31_populate_dml_pipes_from_context()
1707 context->bw_ctx.dml.ip.det_buffer_size_kbytes = 192; in dcn31_populate_dml_pipes_from_context()
1712 context->bw_ctx.dml.ip.det_buffer_size_kbytes = dc->debug.crb_alloc_policy * 64; in dcn31_populate_dml_pipes_from_context()
1714 context->bw_ctx.dml.ip.det_buffer_size_kbytes = 192; in dcn31_populate_dml_pipes_from_context()
1793 …dml_get_status_message(context->bw_ctx.dml.vba.ValidationStatus[context->bw_ctx.dml.vba.soc.num_st… in dcn31_validate_bandwidth()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/ |
| H A D | rv1_clk_mgr.c | 197 struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk; in rv1_update_clocks()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/ |
| H A D | dcn316_clk_mgr.c | 141 struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk; in dcn316_update_clocks()
233 if (new_clocks->dppclk_khz >= dc->current_state->bw_ctx.bw.dcn.clk.dppclk_khz) in dcn316_update_clocks()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn32/ |
| H A D | dcn32_resource.c | 1824 context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching = false; in dcn32_validate_bandwidth()
1825 context->bw_ctx.dml.soc.dram_clock_change_requirement_final = true; in dcn32_validate_bandwidth()
1875 …dml_get_status_message(context->bw_ctx.dml.vba.ValidationStatus[context->bw_ctx.dml.vba.soc.num_st… in dcn32_validate_bandwidth()
2004 if (context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching || subvp_in_use) in dcn32_populate_dml_pipes_from_context()
2005 context->bw_ctx.dml.soc.dram_clock_change_requirement_final = false; in dcn32_populate_dml_pipes_from_context()
2007 context->bw_ctx.dml.soc.dram_clock_change_requirement_final = true; in dcn32_populate_dml_pipes_from_context()
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| H A D | dcn32_hwseq.c | 223 mall_ss_size_bytes = ctx->bw_ctx.bw.dcn.mall_ss_size_bytes; in dcn32_calculate_cab_allocation()
737 struct dc_clocks *clocks = &dc->current_state->bw_ctx.bw.dcn.clk; in dcn32_initialize_min_clocks()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/dcn302/ |
| H A D | dcn302_fpu.c | 345 dml_init_instance(&dc->current_state->bw_ctx.dml, &dcn3_02_soc, &dcn3_02_ip, DML_PROJECT_DCN30); in dcn302_fpu_update_bw_bounding_box()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dce110/ |
| H A D | dce110_hw_sequencer.c | 1853 context->bw_ctx.bw.dce.nbp_state_change_wm_ns[num_pipes], in dce110_set_displaymarks()
1854 context->bw_ctx.bw.dce.stutter_exit_wm_ns[num_pipes], in dce110_set_displaymarks()
1855 context->bw_ctx.bw.dce.stutter_entry_wm_ns[num_pipes], in dce110_set_displaymarks()
1856 context->bw_ctx.bw.dce.urgent_wm_ns[num_pipes], in dce110_set_displaymarks()
1862 context->bw_ctx.bw.dce.nbp_state_change_wm_ns[num_pipes], in dce110_set_displaymarks()
1863 context->bw_ctx.bw.dce.stutter_exit_wm_ns[num_pipes], in dce110_set_displaymarks()
1864 context->bw_ctx.bw.dce.urgent_wm_ns[num_pipes], in dce110_set_displaymarks()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/inc/ |
| H A D | core_types.h | 533 struct bw_context bw_ctx; member
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/dcn303/ |
| H A D | dcn303_fpu.c | 353 dml_init_instance(&dc->current_state->bw_ctx.dml, &dcn3_03_soc, &dcn3_03_ip, DML_PROJECT_DCN30); in dcn303_fpu_update_bw_bounding_box()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/ |
| H A D | dcn31_clk_mgr.c | 139 struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk; in dcn31_update_clocks()
242 if (new_clocks->dppclk_khz >= dc->current_state->bw_ctx.bw.dcn.clk.dppclk_khz) in dcn31_update_clocks()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/ |
| H A D | dcn315_clk_mgr.c | 131 struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk; in dcn315_update_clocks()
229 if (new_clocks->dppclk_khz >= dc->current_state->bw_ctx.bw.dcn.clk.dppclk_khz) in dcn315_update_clocks()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/ |
| H A D | dcn314_clk_mgr.c | 166 struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk; in dcn314_update_clocks()
270 if (new_clocks->dppclk_khz >= dc->current_state->bw_ctx.bw.dcn.clk.dppclk_khz) in dcn314_update_clocks()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/ |
| H A D | dcn32_clk_mgr.c | 459 struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk; in dcn32_update_clocks()
562 if (context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching) in dcn32_update_clocks()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/ |
| H A D | dcn30_clk_mgr.c | 197 struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk; in dcn3_update_clocks()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/ |
| H A D | vg_clk_mgr.c | 100 struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk; in vg_update_clocks()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/ |
| H A D | rn_clk_mgr.c | 136 struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk; in rn_update_clocks()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/dcn321/ |
| H A D | dcn321_fpu.c | 848 dml_init_instance(&dc->current_state->bw_ctx.dml, &dcn3_21_soc, &dcn3_21_ip, DML_PROJECT_DCN32); in dcn321_update_bw_bounding_box_fpu()
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