| /openbmc/u-boot/arch/arm/mach-stm32/ |
| H A D | Kconfig | 11 select RAM
27 select RAM
65 select RAM
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| /openbmc/u-boot/Documentation/devicetree/bindings/ram/ |
| H A D | fsl,mpc83xx-mem-controller.txt | 1 MPC83xx RAM controller
3 This driver supplies support for the embedded RAM controller on MCP83xx-series
7 describing the actual RAM modules installed.
14 - reg: The address of the RAM controller's register space
211 RAM module node:
216 * cs - the chipselect used to drive this RAM module
217 * addr - the address where this RAM module's memory is map
219 * size - the size of the RAM module's memory in bytes
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| /openbmc/linux/Documentation/ABI/testing/ |
| H A D | sysfs-bus-coresight-devices-tmc | 5 Description: (RW) Disables write access to the Trace RAM by stopping the
14 Description: (Read) Defines the size, in 32-bit words, of the local RAM buffer.
28 Description: (Read) Shows the value held by the TMC RAM Read Pointer register
29 that is used to read entries from the Trace RAM over the APB
37 Description: (Read) Shows the value held by the TMC RAM Write Pointer register
39 the CoreSight bus into the Trace RAM. The value is read directly
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| /openbmc/u-boot/doc/ |
| H A D | README.ramboot-ppc85xx | 15 1. Load the RAM based bootloader onto DDR via JTAG/BDI interface. And then
22 2. Load the RAM based bootloader onto DDR using already existing bootloader on
32 support for example AMP boot. In this case also RAM boot loader can be
36 RAM based bootloader can offer an updated bootloader on the system.
45 - In case of the pure RAM based bootloaders we have to do it by JTAG manually or already existing b…
55 Load the RAM based boot loader to the proper location in DDR/L2SRAM.
61 execute the RAM based bootloader.
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| /openbmc/linux/Documentation/arch/arm/ |
| H A D | tcm.rst | 8 This is usually just a few (4-64) KiB of RAM inside the ARM
32 place you put it, it will mask any underlying RAM from the
33 CPU so it is usually wise not to overlap any physical RAM with
55 - Idle loops where all external RAM is set to self-refresh
56 retention mode, so only on-chip RAM is accessible by
61 the external RAM controller.
72 - Have the remaining TCM RAM added to a special
138 printk("Hello TCM executed from ITCM RAM\n");
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| /openbmc/qemu/docs/devel/ |
| H A D | memory.rst | 8 - ordinary RAM
15 - tracking RAM changes by the guest
20 (leaves) are RAM and MMIO regions, while other nodes represent
33 - RAM: a RAM region is simply a range of host memory that can be made available
44 - ROM: a ROM memory region works like RAM for reads (directly accessing
48 - ROM device: a ROM device memory region works like RAM for reads
73 of RAM addressed, or a memory controller that splits main memory to
89 (that is, to an MMIO, RAM or ROM region). This means that the region
92 container itself (ie by its MMIO callbacks or RAM backing). However
101 Where the memory region is backed by host memory (RAM, ROM and
[all …]
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| /openbmc/linux/Documentation/arch/arm/keystone/ |
| H A D | knav-qmss.rst | 12 processors(PDSP), linking RAM, descriptor pools and infrastructure
18 Linking RAM registers are used to link the descriptors which are stored in
19 descriptor RAM. Descriptor RAM is configurable as internal or external memory.
20 The QMSS driver manages the PDSP setups, linking RAM regions,
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| /openbmc/linux/arch/arm/mach-socfpga/ |
| H A D | Kconfig | 25 bool "Suspend to RAM on SOCFPGA"
27 Select this if you want to enable Suspend-to-RAM on SOCFPGA
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| /openbmc/linux/Documentation/admin-guide/ |
| H A D | initrd.rst | 1 Using the initial RAM disk (initrd)
8 initrd provides the capability to load a RAM disk by the boot loader.
9 This RAM disk can then be mounted as the root file system and programs
27 1) the boot loader loads the kernel and the initial RAM disk
28 2) the kernel converts initrd into a "normal" RAM disk and
64 initrd data is preserved but it is not converted to a RAM disk and
77 with the RAM disk mounted as root.
117 Second, the kernel has to be compiled with RAM disk support and with
128 - a RAM disk (fast, but allocates physical memory)
220 - unmounting the initrd file system and de-allocating the RAM disk
[all …]
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| H A D | ramoops.rst | 11 Ramoops is an oops/panic logger that writes its logs to RAM before the system
13 needs a system with persistent RAM so that the content of that area can
54 to life (i.e. a watchdog triggered). In such cases, RAM may be somewhat
121 You can specify either RAM memory or peripheral devices' memory. However, when
122 specifying RAM, be sure to reserve the memory by issuing memblock_reserve()
140 a stored record from RAM, simply unlink the respective pstore file.
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| /openbmc/u-boot/arch/arm/mach-k3/ |
| H A D | Kconfig | 21 of this RAM. Once ROM gives control to SPL then this
35 Describes the base address of MCU Scratchpad RAM.
41 Describes the size of MCU Scratchpad RAM.
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| /openbmc/linux/arch/m68k/ |
| H A D | Kconfig.machine | 370 comment "RAM configuration"
373 hex "Address of the base of RAM"
382 hex "Size of RAM (in bytes), or 0 for automatic"
385 Define the size of the system RAM. If you select 0 then the
386 kernel will try to probe the RAM size at runtime. This is not
394 put at the start of RAM, but it doesn't have to be. On ColdFire
425 of RAM, but usually some small offset from it. Define the start
427 processor vectors at the base of RAM and then the start of the
440 regions being copied out to RAM at startup.
465 bool "RAM"
[all …]
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| /openbmc/u-boot/board/imgtec/xilfpga/ |
| H A D | README | 20 - 128Mbyte DDR RAM at 0x0000_0000
21 - 8Kbyte RAM at 0x1000_0000
34 The BootRAM is a writeable "RAM" in FPGA at 0x1FC0_0000.
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| /openbmc/u-boot/board/efi/ |
| H A D | Kconfig | 12 takes over once the RAM, video and CPU are fully running.
20 takes over once the RAM, video and CPU are fully running.
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| /openbmc/linux/arch/powerpc/platforms/powernv/ |
| H A D | Kconfig | 30 bool "Enable runtime allocation of RAM for tracing"
33 Enabling this option allows for runtime allocation of memory (RAM)
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| /openbmc/u-boot/arch/arm/mach-snapdragon/ |
| H A D | Kconfig | 22 - 1GiB RAM
35 - 3GiB RAM
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| /openbmc/linux/Documentation/devicetree/bindings/reserved-memory/ |
| H A D | phram.yaml | 7 title: MTD/block device in RAM
13 The "phram" node is named after the "MTD in PHysical RAM" driver which
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| /openbmc/linux/Documentation/devicetree/bindings/mips/img/ |
| H A D | xilfpga.txt | 20 - 128Mbyte DDR RAM at 0x0000_0000
21 - 8Kbyte RAM at 0x1000_0000
69 The BootRAM is a writeable "RAM" in FPGA at 0x1FC0_0000.
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| /openbmc/u-boot/lib/efi/ |
| H A D | Kconfig | 29 hex "Amount of EFI RAM for U-Boot"
33 Set the amount of EFI RAM which is claimed by U-Boot for its own
36 It is used as the RAM size in with U-Boot.
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| /openbmc/openbmc/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-m/files/corstone1000/ |
| H A D | 0002-platform-corstone1000-Cover-S_DATA-with-MPU.patch | 27 + # The RAM MPU Region block sizes are calculated manually. The RAM has to be covered
53 + /* Set the RAM attributes. It is needed because the first region overlaps the whole
|
| /openbmc/linux/Documentation/networking/devlink/ |
| H A D | iosm.rst | 49 * - ``PSI RAM``
56 PSI RAM and EBL are the RAM images which are injected to the device when the
70 1) When modem is in Boot ROM stage, user can use below command to inject PSI RAM
112 device (RAM dump).
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| /openbmc/linux/Documentation/devicetree/bindings/soc/ti/ |
| H A D | keystone-navigator-qmss.txt | 6 processors(PDSP), linking RAM, descriptor pools and infrastructure
12 Linking RAM registers are used to link the descriptors which are stored in
13 descriptor RAM. Descriptor RAM is configurable as internal or external memory.
14 The QMSS driver manages the PDSP setups, linking RAM regions,
38 - Queue status RAM.
109 - PDSP internal RAM region.
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| /openbmc/linux/Documentation/devicetree/bindings/soc/fsl/cpm_qe/ |
| H A D | cpm.txt | 34 parameter RAM region (if it has one).
36 * Multi-User RAM (MURAM)
38 The multi-user/dual-ported RAM is expressed as a bus under the CPM node.
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| /openbmc/qemu/docs/system/arm/ |
| H A D | realview.rst | 9 enabled in the kernel, and expect 512M RAM. Kernels for The PBX-A9 board
11 disabled and expect 1024M RAM.
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| /openbmc/linux/arch/arm/boot/dts/marvell/ |
| H A D | armada-xp-matrix.dts | 24 * This board has 4 GB of RAM, but the last 256 MB of
25 * RAM are not usable due to the overlap with the MBus
|