1*e4061556SMario SixMPC83xx RAM controller 2*e4061556SMario Six 3*e4061556SMario SixThis driver supplies support for the embedded RAM controller on MCP83xx-series 4*e4061556SMario SixSoCs. 5*e4061556SMario Six 6*e4061556SMario SixFor static configuration mode, each controller node should have child nodes 7*e4061556SMario Sixdescribing the actual RAM modules installed. 8*e4061556SMario Six 9*e4061556SMario SixController node 10*e4061556SMario Six=============== 11*e4061556SMario Six 12*e4061556SMario SixRequired properties: 13*e4061556SMario Six- compatible: Must be "fsl,mpc83xx-mem-controller" 14*e4061556SMario Six- reg: The address of the RAM controller's register space 15*e4061556SMario Six- #address-cells: Must be 2 16*e4061556SMario Six- #size-cells: Must be 1 17*e4061556SMario Six- driver_software_override: DDR driver software override is enabled (1) or 18*e4061556SMario Six disabled (0) 19*e4061556SMario Six- p_impedance_override: DDR driver software p-impedance override; possible 20*e4061556SMario Six values: 21*e4061556SMario Six * DSO_P_IMPEDANCE_HIGHEST_Z 22*e4061556SMario Six * DSO_P_IMPEDANCE_MUCH_HIGHER_Z 23*e4061556SMario Six * DSO_P_IMPEDANCE_HIGHER_Z 24*e4061556SMario Six * DSO_P_IMPEDANCE_NOMINAL 25*e4061556SMario Six * DSO_P_IMPEDANCE_LOWER_Z 26*e4061556SMario Six- n_impedance_override: DDR driver software n-impedance override; possible 27*e4061556SMario Six values: 28*e4061556SMario Six * DSO_N_IMPEDANCE_HIGHEST_Z 29*e4061556SMario Six * DSO_N_IMPEDANCE_MUCH_HIGHER_Z 30*e4061556SMario Six * DSO_N_IMPEDANCE_HIGHER_Z 31*e4061556SMario Six * DSO_N_IMPEDANCE_NOMINAL 32*e4061556SMario Six * DSO_N_IMPEDANCE_LOWER_Z 33*e4061556SMario Six- odt_termination_value: ODT termination value for I/Os; possible values: 34*e4061556SMario Six * ODT_TERMINATION_75_OHM 35*e4061556SMario Six * ODT_TERMINATION_150_OHM 36*e4061556SMario Six- ddr_type: Selects voltage level for DDR pads; possible 37*e4061556SMario Six values: 38*e4061556SMario Six * DDR_TYPE_DDR2_1_8_VOLT 39*e4061556SMario Six * DDR_TYPE_DDR1_2_5_VOLT 40*e4061556SMario Six- mvref_sel: Determine where MVREF_SEL signal is generated; 41*e4061556SMario Six possible values: 42*e4061556SMario Six * MVREF_SEL_EXTERNAL 43*e4061556SMario Six * MVREF_SEL_INTERNAL_GVDD 44*e4061556SMario Six- m_odr: Disable memory transaction reordering; possible 45*e4061556SMario Six values: 46*e4061556SMario Six * M_ODR_ENABLE 47*e4061556SMario Six * M_ODR_DISABLE 48*e4061556SMario Six- clock_adjust: Clock adjust; possible values: 49*e4061556SMario Six * CLOCK_ADJUST_025 50*e4061556SMario Six * CLOCK_ADJUST_05 51*e4061556SMario Six * CLOCK_ADJUST_075 52*e4061556SMario Six * CLOCK_ADJUST_1 53*e4061556SMario Six- ext_refresh_rec: Extended refresh recovery time; possible values: 54*e4061556SMario Six 0, 16, 32, 48, 64, 80, 96, 112 55*e4061556SMario Six- read_to_write: Read-to-write turnaround; possible values: 56*e4061556SMario Six 0, 1, 2, 3 57*e4061556SMario Six- write_to_read: Write-to-read turnaround; possible values: 58*e4061556SMario Six 0, 1, 2, 3 59*e4061556SMario Six- read_to_read: Read-to-read turnaround; possible values: 60*e4061556SMario Six 0, 1, 2, 3 61*e4061556SMario Six- write_to_write: Write-to-write turnaround; possible values: 62*e4061556SMario Six 0, 1, 2, 3 63*e4061556SMario Six- active_powerdown_exit: Active powerdown exit timing; possible values: 64*e4061556SMario Six 1, 2, 3, 4, 5, 6, 7 65*e4061556SMario Six- precharge_powerdown_exit: Precharge powerdown exit timing; possible values: 66*e4061556SMario Six 1, 2, 3, 4, 5, 6, 7 67*e4061556SMario Six- odt_powerdown_exit: ODT powerdown exit timing; possible values: 68*e4061556SMario Six 0, 1, 2, 3, 4, 5, 6, 7, 8, 69*e4061556SMario Six 9, 10, 11, 12, 13, 14, 15 70*e4061556SMario Six- mode_reg_set_cycle: Mode register set cycle time; possible values: 71*e4061556SMario Six 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 72*e4061556SMario Six- precharge_to_activate: Precharge-to-acitvate interval; possible values: 73*e4061556SMario Six 1, 2, 3, 4, 5, 6, 7 74*e4061556SMario Six- activate_to_precharge: Activate to precharge interval; possible values: 75*e4061556SMario Six 4, 5, 6, 7, 8, 9, 10, 11, 12, 76*e4061556SMario Six 13, 14, 15, 16, 17, 18, 19 77*e4061556SMario Six- activate_to_readwrite: Activate to read/write interval for SDRAM; 78*e4061556SMario Six possible values: 79*e4061556SMario Six 1, 2, 3, 4, 5, 6, 7 80*e4061556SMario Six- mcas_latency: MCAS latency from READ command; possible values: 81*e4061556SMario Six * CASLAT_20 82*e4061556SMario Six * CASLAT_25 83*e4061556SMario Six * CASLAT_30 84*e4061556SMario Six * CASLAT_35 85*e4061556SMario Six * CASLAT_40 86*e4061556SMario Six * CASLAT_45 87*e4061556SMario Six * CASLAT_50 88*e4061556SMario Six * CASLAT_55 89*e4061556SMario Six * CASLAT_60 90*e4061556SMario Six * CASLAT_65 91*e4061556SMario Six * CASLAT_70 92*e4061556SMario Six * CASLAT_75 93*e4061556SMario Six * CASLAT_80 94*e4061556SMario Six- refresh_recovery: Refresh recovery time; possible values: 95*e4061556SMario Six 8, 9, 10, 11, 12, 13, 14, 15, 96*e4061556SMario Six 16, 17, 18, 19, 20, 21, 22, 23 97*e4061556SMario Six- last_data_to_precharge: Last data to precharge minimum interval; possible 98*e4061556SMario Six values: 99*e4061556SMario Six 1, 2, 3, 4, 5, 6, 7 100*e4061556SMario Six- activate_to_activate: Activate-to-activate interval; possible values: 101*e4061556SMario Six 1, 2, 3, 4, 5, 6, 7 102*e4061556SMario Six- last_write_data_to_read: Last write data pair to read command issue 103*e4061556SMario Six interval; possible values: 104*e4061556SMario Six 1, 2, 3, 4, 5, 6, 7 105*e4061556SMario Six- additive_latency: Additive latency; possible values: 106*e4061556SMario Six 0, 1, 2, 3, 4, 5 107*e4061556SMario Six- mcas_to_preamble_override: MCAS-to-preamble-override; possible values: 108*e4061556SMario Six * READ_LAT 109*e4061556SMario Six * READ_LAT_PLUS_1_4 110*e4061556SMario Six * READ_LAT_PLUS_1_2 111*e4061556SMario Six * READ_LAT_PLUS_3_4 112*e4061556SMario Six * READ_LAT_PLUS_1 113*e4061556SMario Six * READ_LAT_PLUS_5_4 114*e4061556SMario Six * READ_LAT_PLUS_3_2 115*e4061556SMario Six * READ_LAT_PLUS_7_4 116*e4061556SMario Six * READ_LAT_PLUS_2 117*e4061556SMario Six * READ_LAT_PLUS_9_4 118*e4061556SMario Six * READ_LAT_PLUS_5_2 119*e4061556SMario Six * READ_LAT_PLUS_11_4 120*e4061556SMario Six * READ_LAT_PLUS_3 121*e4061556SMario Six * READ_LAT_PLUS_13_4 122*e4061556SMario Six * READ_LAT_PLUS_7_2 123*e4061556SMario Six * READ_LAT_PLUS_15_4 124*e4061556SMario Six * READ_LAT_PLUS_4 125*e4061556SMario Six * READ_LAT_PLUS_17_4 126*e4061556SMario Six * READ_LAT_PLUS_9_2 127*e4061556SMario Six * READ_LAT_PLUS_19_4 128*e4061556SMario Six- write_latency: Write latency; possible values: 129*e4061556SMario Six 1, 2, 3, 4, 5, 6, 7 130*e4061556SMario Six- read_to_precharge: Read to precharge; possible values: 131*e4061556SMario Six 1, 2, 3, 4 132*e4061556SMario Six- write_cmd_to_write_data: Write command to write data strobe timing 133*e4061556SMario Six adjustment; possible values: 134*e4061556SMario Six * CLOCK_DELAY_0 135*e4061556SMario Six * CLOCK_DELAY_1_4 136*e4061556SMario Six * CLOCK_DELAY_1_2 137*e4061556SMario Six * CLOCK_DELAY_3_4 138*e4061556SMario Six * CLOCK_DELAY_1 139*e4061556SMario Six * CLOCK_DELAY_5_4 140*e4061556SMario Six * CLOCK_DELAY_3_2 141*e4061556SMario Six- minimum_cke_pulse_width: Minimum CKE pulse width; possible values: 142*e4061556SMario Six 1, 2, 3, 4 143*e4061556SMario Six- four_activates_window: Window for four activates; possible values: 144*e4061556SMario Six 1, 2, 3, 4 8, 9, 10, 11, 12, 145*e4061556SMario Six 13, 14, 15, 16, 17, 18, 19 146*e4061556SMario Six- self_refresh: Self refresh (during sleep); possible values: 147*e4061556SMario Six * SREN_DISABLE 148*e4061556SMario Six * SREN_ENABLE 149*e4061556SMario Six- ecc: Support for ECC; possible values: 150*e4061556SMario Six * ECC_DISABLE 151*e4061556SMario Six * ECC_ENABLE 152*e4061556SMario Six- registered_dram: Support for registered DRAM; possible values: 153*e4061556SMario Six * RD_DISABLE 154*e4061556SMario Six * RD_ENABLE 155*e4061556SMario Six- sdram_type: Type of SDRAM device to be used; possible values: 156*e4061556SMario Six * TYPE_DDR1 157*e4061556SMario Six * TYPE_DDR2 158*e4061556SMario Six- dynamic_power_management: Dynamic power management mode; possible values: 159*e4061556SMario Six * DYN_PWR_DISABLE 160*e4061556SMario Six * DYN_PWR_ENABLE 161*e4061556SMario Six- databus_width: DRAM data bus width; possible values 162*e4061556SMario Six * DATA_BUS_WIDTH_16 163*e4061556SMario Six * DATA_BUS_WIDTH_32 164*e4061556SMario Six- nc_auto_precharge: Non-concurrent auto-precharge; possible values: 165*e4061556SMario Six * NCAP_DISABLE 166*e4061556SMario Six * NCAP_ENABLE 167*e4061556SMario Six- timing_2t: 2T timing; possible values: 168*e4061556SMario Six * TIMING_1T 169*e4061556SMario Six * TIMING_2T 170*e4061556SMario Six- bank_interleaving_ctrl: Bank (chip select) interleaving control; possible 171*e4061556SMario Six values: 172*e4061556SMario Six * INTERLEAVE_NONE 173*e4061556SMario Six * INTERLEAVE_1_AND_2 174*e4061556SMario Six- precharge_bit_8: Precharge bin 8; possible values 175*e4061556SMario Six * PRECHARGE_MA_10 176*e4061556SMario Six * PRECHARGE_MA_8 177*e4061556SMario Six- half_strength: Global half-strength override; possible values: 178*e4061556SMario Six * STRENGTH_FULL 179*e4061556SMario Six * STRENGTH_HALF 180*e4061556SMario Six- bypass_initialization: Bypass initialization; possible values: 181*e4061556SMario Six * INITIALIZATION_DONT_BYPASS 182*e4061556SMario Six * INITIALIZATION_BYPASS 183*e4061556SMario Six- force_self_refresh: Force self refresh; possible values: 184*e4061556SMario Six * MODE_NORMAL 185*e4061556SMario Six * MODE_REFRESH 186*e4061556SMario Six- dll_reset: DLL reset; possible values: 187*e4061556SMario Six * DLL_RESET_ENABLE 188*e4061556SMario Six * DLL_RESET_DISABLE 189*e4061556SMario Six- dqs_config: DQS configuration; possible values: 190*e4061556SMario Six * DQS_TRUE 191*e4061556SMario Six- odt_config: ODT configuration; possible values: 192*e4061556SMario Six * ODT_ASSERT_NEVER 193*e4061556SMario Six * ODT_ASSERT_WRITES 194*e4061556SMario Six * ODT_ASSERT_READS 195*e4061556SMario Six * ODT_ASSERT_ALWAYS 196*e4061556SMario Six- posted_refreshes: Number of posted refreshes 197*e4061556SMario Six 1, 2, 3, 4, 5, 6, 7, 8 198*e4061556SMario Six- sdmode: Initial value loaded into the DDR SDRAM mode 199*e4061556SMario Six register 200*e4061556SMario Six- esdmode: Initial value loaded into the DDR SDRAM extended 201*e4061556SMario Six mode register 202*e4061556SMario Six- esdmode2: Initial value loaded into the DDR SDRAM extended 203*e4061556SMario Six mode 2 register 204*e4061556SMario Six- esdmode3: Initial value loaded into the DDR SDRAM extended 205*e4061556SMario Six mode 3 register 206*e4061556SMario Six- refresh_interval: Refresh interval; possible values: 207*e4061556SMario Six 0 - 65535 208*e4061556SMario Six- precharge_interval: Precharge interval; possible values: 209*e4061556SMario Six 0 - 16383 210*e4061556SMario Six 211*e4061556SMario SixRAM module node: 212*e4061556SMario Six================ 213*e4061556SMario Six 214*e4061556SMario SixRequired properties: 215*e4061556SMario Six- reg: A triple <cs addr size>, which consists of: 216*e4061556SMario Six * cs - the chipselect used to drive this RAM module 217*e4061556SMario Six * addr - the address where this RAM module's memory is map 218*e4061556SMario Six to in the global memory space 219*e4061556SMario Six * size - the size of the RAM module's memory in bytes 220*e4061556SMario Six- auto_precharge: Chip select auto-precharge; possible values: 221*e4061556SMario Six * AUTO_PRECHARGE_ENABLE 222*e4061556SMario Six * AUTO_PRECHARGE_DISABLE 223*e4061556SMario Six- odt_rd_cfg: ODT for reads configuration; possible values: 224*e4061556SMario Six * ODT_RD_NEVER 225*e4061556SMario Six * ODT_RD_ONLY_CURRENT 226*e4061556SMario Six * ODT_RD_ONLY_OTHER_CS 227*e4061556SMario Six * ODT_RD_ONLY_OTHER_DIMM 228*e4061556SMario Six * ODT_RD_ALL 229*e4061556SMario Six- odt_wr_cfg: ODT for writes configuration; possible values: 230*e4061556SMario Six * ODT_WR_NEVER 231*e4061556SMario Six * ODT_WR_ONLY_CURRENT 232*e4061556SMario Six * ODT_WR_ONLY_OTHER_CS 233*e4061556SMario Six * ODT_WR_ONLY_OTHER_DIMM 234*e4061556SMario Six * ODT_WR_ALL 235*e4061556SMario Six- bank_bits: Number of bank bits for SDRAM on chip select; possible 236*e4061556SMario Six values: 237*e4061556SMario Six 2, 3 238*e4061556SMario Six- row_bits: Number of row bits for SDRAM on chip select; possible values: 239*e4061556SMario Six 12, 13, 14 240*e4061556SMario Six- col_bits: Number of column bits for SDRAM on chip select; possible 241*e4061556SMario Six values: 242*e4061556SMario Six 8, 9, 10, 11 243*e4061556SMario Six 244*e4061556SMario SixExample: 245*e4061556SMario Six 246*e4061556SMario Sixmemory@2000 { 247*e4061556SMario Six #address-cells = <2>; 248*e4061556SMario Six #size-cells = <1>; 249*e4061556SMario Six compatible = "fsl,mpc83xx-mem-controller"; 250*e4061556SMario Six reg = <0x2000 0x1000>; 251*e4061556SMario Six device_type = "memory"; 252*e4061556SMario Six u-boot,dm-pre-reloc; 253*e4061556SMario Six 254*e4061556SMario Six driver_software_override = <DSO_ENABLE>; 255*e4061556SMario Six p_impedance_override = <DSO_P_IMPEDANCE_NOMINAL>; 256*e4061556SMario Six n_impedance_override = <DSO_N_IMPEDANCE_NOMINAL>; 257*e4061556SMario Six odt_termination_value = <ODT_TERMINATION_150_OHM>; 258*e4061556SMario Six ddr_type = <DDR_TYPE_DDR2_1_8_VOLT>; 259*e4061556SMario Six 260*e4061556SMario Six clock_adjust = <CLOCK_ADJUST_05>; 261*e4061556SMario Six 262*e4061556SMario Six read_to_write = <0>; 263*e4061556SMario Six write_to_read = <0>; 264*e4061556SMario Six read_to_read = <0>; 265*e4061556SMario Six write_to_write = <0>; 266*e4061556SMario Six active_powerdown_exit = <2>; 267*e4061556SMario Six precharge_powerdown_exit = <6>; 268*e4061556SMario Six odt_powerdown_exit = <8>; 269*e4061556SMario Six mode_reg_set_cycle = <2>; 270*e4061556SMario Six 271*e4061556SMario Six precharge_to_activate = <2>; 272*e4061556SMario Six activate_to_precharge = <6>; 273*e4061556SMario Six activate_to_readwrite = <2>; 274*e4061556SMario Six mcas_latency = <CASLAT_40>; 275*e4061556SMario Six refresh_recovery = <17>; 276*e4061556SMario Six last_data_to_precharge = <2>; 277*e4061556SMario Six activate_to_activate = <2>; 278*e4061556SMario Six last_write_data_to_read = <2>; 279*e4061556SMario Six 280*e4061556SMario Six additive_latency = <0>; 281*e4061556SMario Six mcas_to_preamble_override = <READ_LAT_PLUS_1_2>; 282*e4061556SMario Six write_latency = <3>; 283*e4061556SMario Six read_to_precharge = <2>; 284*e4061556SMario Six write_cmd_to_write_data = <CLOCK_DELAY_1_2>; 285*e4061556SMario Six minimum_cke_pulse_width = <3>; 286*e4061556SMario Six four_activates_window = <5>; 287*e4061556SMario Six 288*e4061556SMario Six self_refresh = <SREN_ENABLE>; 289*e4061556SMario Six sdram_type = <TYPE_DDR2>; 290*e4061556SMario Six databus_width = <DATA_BUS_WIDTH_32>; 291*e4061556SMario Six 292*e4061556SMario Six force_self_refresh = <MODE_NORMAL>; 293*e4061556SMario Six dll_reset = <DLL_RESET_ENABLE>; 294*e4061556SMario Six dqs_config = <DQS_TRUE>; 295*e4061556SMario Six odt_config = <ODT_ASSERT_READS>; 296*e4061556SMario Six posted_refreshes = <1>; 297*e4061556SMario Six 298*e4061556SMario Six refresh_interval = <2084>; 299*e4061556SMario Six precharge_interval = <256>; 300*e4061556SMario Six 301*e4061556SMario Six sdmode = <0x0242>; 302*e4061556SMario Six esdmode = <0x0440>; 303*e4061556SMario Six 304*e4061556SMario Six ram@0 { 305*e4061556SMario Six reg = <0x0 0x0 0x8000000>; 306*e4061556SMario Six compatible = "nanya,nt5tu64m16hg"; 307*e4061556SMario Six 308*e4061556SMario Six odt_rd_cfg = <ODT_RD_NEVER>; 309*e4061556SMario Six odt_wr_cfg = <ODT_WR_ONLY_CURRENT>; 310*e4061556SMario Six bank_bits = <3>; 311*e4061556SMario Six row_bits = <13>; 312*e4061556SMario Six col_bits = <10>; 313*e4061556SMario Six }; 314*e4061556SMario Six}; 315