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Searched refs:CONFIG_SYS_TIMERBASE (Results 1 – 25 of 35) sorted by relevance

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/openbmc/u-boot/arch/arm/mach-versatile/
H A Dtimer.c39 tmr_ctrl_val = *(volatile ulong *)(CONFIG_SYS_TIMERBASE + 8); in timer_init()
41 *(volatile ulong *)(CONFIG_SYS_TIMERBASE + 8) = tmr_ctrl_val; in timer_init()
55 tmr_ctrl_val = *(volatile ulong *)(CONFIG_SYS_TIMERBASE + 8); in timer_init()
59 *(volatile ulong *)(CONFIG_SYS_TIMERBASE + 8) = tmr_ctrl_val; in timer_init()
/openbmc/u-boot/board/armltd/integrator/
H A Dtimer.c45 #define READ_TIMER (*(volatile ulong *)(CONFIG_SYS_TIMERBASE+4))
56 *(volatile ulong *)(CONFIG_SYS_TIMERBASE + 0) = TIMER_LOAD_VAL; in timer_init()
67 *(volatile ulong *)(CONFIG_SYS_TIMERBASE + 8) = 0x000000C2; in timer_init()
76 *(volatile ulong *)(CONFIG_SYS_TIMERBASE + 8) = 0x00000088; in timer_init()
/openbmc/u-boot/include/configs/
H A Dsocfpga_common.h100 #define CONFIG_SYS_TIMERBASE SOCFPGA_OSC1TIMER0_ADDRESS macro
102 #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMERBASE + 0x4)
H A Dzynq-common.h27 #define CONFIG_SYS_TIMERBASE ZYNQ_SCUTIMER_BASEADDR macro
29 #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMERBASE + 0x4)
H A Dti_am335x_common.h16 #define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */ macro
H A Dintegrator-common.h11 #define CONFIG_SYS_TIMERBASE 0x13000100 /* Timer1 */ macro
H A Dti_omap3_common.h53 #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) macro
H A Dbur_am335x_common.h31 #define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */ macro
H A Dti_omap5_common.h20 #define CONFIG_SYS_TIMERBASE GPT2_BASE macro
H A Dkc1.h33 #define CONFIG_SYS_TIMERBASE GPT2_BASE macro
H A Dsniper.h28 #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2 macro
H A Dti814x_evm.h110 #define CONFIG_SYS_TIMERBASE 0x4802E000 macro
H A Dlegoev3.h23 #define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE macro
H A Dcm_t43.h14 #define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */ macro
H A Dti816x_evm.h41 #define CONFIG_SYS_TIMERBASE 0x4802E000 macro
H A Dti_omap4_common.h24 #define CONFIG_SYS_TIMERBASE GPT2_BASE macro
H A Dcm_t3517.h165 #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) macro
H A Dtao3530.h148 #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) macro
H A Dea20.h27 #define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE macro
H A Dcm_t35.h165 #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) macro
H A Dtricorder.h193 #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) macro
H A Dmcx.h205 #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2 macro
H A Dam3517_crane.h170 #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2 macro
/openbmc/u-boot/arch/arm/mach-socfpga/
H A Dtimer.c12 static const struct socfpga_timer *timer_base = (void *)CONFIG_SYS_TIMERBASE;
/openbmc/u-boot/arch/arm/mach-omap2/
H A Dtimer.c25 static struct gptimer *timer_base = (struct gptimer *)CONFIG_SYS_TIMERBASE;

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