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/openbmc/u-boot/arch/arc/include/asm/
H A Darcregs.hdb6ce231 Mon Dec 14 08:15:13 CST 2015 Alexey Brodkin <Alexey.Brodkin@synopsys.com> arc: cache - utilize IO coherency (AKA IOC) engine

With release of ARC HS38 v2.1 new IO coherency engine could be built-in
ARC core. This hardware module ensures coherency between DMA-ed data
from peripherals and L2 cache.

With L2 and IOC enabled there's no overhead for L2 cache manual
maintenance which results in significantly improved IO bandwidth.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
/openbmc/u-boot/arch/arc/lib/
H A Dcache.cdb6ce231 Mon Dec 14 08:15:13 CST 2015 Alexey Brodkin <Alexey.Brodkin@synopsys.com> arc: cache - utilize IO coherency (AKA IOC) engine

With release of ARC HS38 v2.1 new IO coherency engine could be built-in
ARC core. This hardware module ensures coherency between DMA-ed data
from peripherals and L2 cache.

With L2 and IOC enabled there's no overhead for L2 cache manual
maintenance which results in significantly improved IO bandwidth.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>