Searched hist:bb5ce9a5 (Results 1 – 4 of 4) sorted by relevance
/openbmc/linux/drivers/net/ethernet/intel/ixgbe/ |
H A D | ixgbe_phy.h | bb5ce9a5 Sat Aug 08 18:18:02 CDT 2015 Mark Rustad <mark.d.rustad@intel.com> ixgbe: Provide unlocked I2C methods
Most I2C accesses take and release semaphores for each access. Now there is a reason to perform multiple I2C operations under the same holding of the semaphore, so provide unlocked I2C methods for that purpose.
Signed-off-by: Mark Rustad <mark.d.rustad@intel.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> bb5ce9a5 Sat Aug 08 18:18:02 CDT 2015 Mark Rustad <mark.d.rustad@intel.com> ixgbe: Provide unlocked I2C methods Most I2C accesses take and release semaphores for each access. Now there is a reason to perform multiple I2C operations under the same holding of the semaphore, so provide unlocked I2C methods for that purpose. Signed-off-by: Mark Rustad <mark.d.rustad@intel.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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H A D | ixgbe_phy.c | bb5ce9a5 Sat Aug 08 18:18:02 CDT 2015 Mark Rustad <mark.d.rustad@intel.com> ixgbe: Provide unlocked I2C methods
Most I2C accesses take and release semaphores for each access. Now there is a reason to perform multiple I2C operations under the same holding of the semaphore, so provide unlocked I2C methods for that purpose.
Signed-off-by: Mark Rustad <mark.d.rustad@intel.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> bb5ce9a5 Sat Aug 08 18:18:02 CDT 2015 Mark Rustad <mark.d.rustad@intel.com> ixgbe: Provide unlocked I2C methods Most I2C accesses take and release semaphores for each access. Now there is a reason to perform multiple I2C operations under the same holding of the semaphore, so provide unlocked I2C methods for that purpose. Signed-off-by: Mark Rustad <mark.d.rustad@intel.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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H A D | ixgbe_x550.c | bb5ce9a5 Sat Aug 08 18:18:02 CDT 2015 Mark Rustad <mark.d.rustad@intel.com> ixgbe: Provide unlocked I2C methods
Most I2C accesses take and release semaphores for each access. Now there is a reason to perform multiple I2C operations under the same holding of the semaphore, so provide unlocked I2C methods for that purpose.
Signed-off-by: Mark Rustad <mark.d.rustad@intel.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> bb5ce9a5 Sat Aug 08 18:18:02 CDT 2015 Mark Rustad <mark.d.rustad@intel.com> ixgbe: Provide unlocked I2C methods Most I2C accesses take and release semaphores for each access. Now there is a reason to perform multiple I2C operations under the same holding of the semaphore, so provide unlocked I2C methods for that purpose. Signed-off-by: Mark Rustad <mark.d.rustad@intel.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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H A D | ixgbe_type.h | bb5ce9a5 Sat Aug 08 18:18:02 CDT 2015 Mark Rustad <mark.d.rustad@intel.com> ixgbe: Provide unlocked I2C methods
Most I2C accesses take and release semaphores for each access. Now there is a reason to perform multiple I2C operations under the same holding of the semaphore, so provide unlocked I2C methods for that purpose.
Signed-off-by: Mark Rustad <mark.d.rustad@intel.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> bb5ce9a5 Sat Aug 08 18:18:02 CDT 2015 Mark Rustad <mark.d.rustad@intel.com> ixgbe: Provide unlocked I2C methods Most I2C accesses take and release semaphores for each access. Now there is a reason to perform multiple I2C operations under the same holding of the semaphore, so provide unlocked I2C methods for that purpose. Signed-off-by: Mark Rustad <mark.d.rustad@intel.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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