Searched hist:"4 e508b25" (Results 1 – 3 of 3) sorted by relevance
/openbmc/linux/include/linux/soc/mediatek/ |
H A D | mtk_sip_svc.h | 4e508b25 Wed Aug 17 07:46:07 CDT 2022 Chengci.Xu <chengci.xu@mediatek.com> memory: mtk-smi: Add enable IOMMU SMC command for MM master
For concerns about security, the register to enable/disable IOMMU of SMI LARB should only be configured in secure world. Thus, we add some SMC command for multimedia master to enable/disable MM IOMMU in ATF by setting the register of SMI LARB. This function is prepared for MT8188.
Signed-off-by: Chengci.Xu <chengci.xu@mediatek.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220817124608.10062-4-chengci.xu@mediatek.com
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/openbmc/linux/include/soc/mediatek/ |
H A D | smi.h | 4e508b25 Wed Aug 17 07:46:07 CDT 2022 Chengci.Xu <chengci.xu@mediatek.com> memory: mtk-smi: Add enable IOMMU SMC command for MM master
For concerns about security, the register to enable/disable IOMMU of SMI LARB should only be configured in secure world. Thus, we add some SMC command for multimedia master to enable/disable MM IOMMU in ATF by setting the register of SMI LARB. This function is prepared for MT8188.
Signed-off-by: Chengci.Xu <chengci.xu@mediatek.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220817124608.10062-4-chengci.xu@mediatek.com
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/openbmc/linux/drivers/memory/ |
H A D | mtk-smi.c | 4e508b25 Wed Aug 17 07:46:07 CDT 2022 Chengci.Xu <chengci.xu@mediatek.com> memory: mtk-smi: Add enable IOMMU SMC command for MM master
For concerns about security, the register to enable/disable IOMMU of SMI LARB should only be configured in secure world. Thus, we add some SMC command for multimedia master to enable/disable MM IOMMU in ATF by setting the register of SMI LARB. This function is prepared for MT8188.
Signed-off-by: Chengci.Xu <chengci.xu@mediatek.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220817124608.10062-4-chengci.xu@mediatek.com
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