Searched +full:xlnx +full:- +full:zynqmp +full:- +full:resets (Results 1 – 16 of 16) sorted by relevance
/openbmc/linux/Documentation/devicetree/bindings/usb/ |
H A D | dwc3-xilinx.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/usb/dwc3-xilinx.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Piyush Mehta <piyush.mehta@amd.com> 15 - enum: 16 - xlnx,zynqmp-dwc3 17 - xlnx,versal-dwc3 21 "#address-cells": 24 "#size-cells": [all …]
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/openbmc/linux/arch/arm64/boot/dts/xilinx/ |
H A D | zynqmp.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * dts file for Xilinx ZynqMP 5 * (C) Copyright 2014 - 2021, Xilinx, Inc. 15 #include <dt-bindings/dma/xlnx-zynqmp-dpdma.h> 16 #include <dt-bindings/gpio/gpio.h> 17 #include <dt-bindings/interrupt-controller/arm-gic.h> 18 #include <dt-bindings/interrupt-controller/irq.h> 19 #include <dt-bindings/power/xlnx-zynqmp-power.h> 20 #include <dt-bindings/reset/xlnx-zynqmp-resets.h> 23 compatible = "xlnx,zynqmp"; [all …]
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/openbmc/linux/Documentation/devicetree/bindings/reset/ |
H A D | xlnx,zynqmp-reset.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/reset/xlnx,zynqmp-reset.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Piyush Mehta <piyush.mehta@amd.com> 13 The Zynq UltraScale+ MPSoC and Versal has several different resets. 25 <dt-bindings/reset/xlnx-zynqmp-resets.h> 28 <dt-bindings/reset/xlnx-versal-resets.h> 33 - xlnx,zynqmp-reset 34 - xlnx,versal-reset [all …]
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/openbmc/linux/Documentation/devicetree/bindings/net/ |
H A D | cdns,macb.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Nicolas Ferre <nicolas.ferre@microchip.com> 11 - Claudiu Beznea <claudiu.beznea@microchip.com> 16 - items: 17 - enum: 18 - cdns,at91rm9200-emac # Atmel at91rm9200 SoC 19 - const: cdns,emac # Generic 21 - items: [all …]
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/openbmc/linux/Documentation/devicetree/bindings/display/xlnx/ |
H A D | xlnx,zynqmp-dpsub.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/xlnx/xlnx,zynqmp-dpsub.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Xilinx ZynqMP DisplayPort Subsystem 10 The DisplayPort subsystem of Xilinx ZynqMP (Zynq UltraScale+ MPSoC) 14 +------------------------------------------------------------+ 15 +--------+ | +----------------+ +-----------+ | 16 | DPDMA | --->| | --> | Video | Video +-------------+ | 17 | 4x vid | | | | | Rendering | -+--> | | | +------+ [all …]
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/openbmc/linux/Documentation/devicetree/bindings/ata/ |
H A D | ceva,ahci-1v84.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/ata/ceva,ahci-1v84.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Piyush Mehta <piyush.mehta@amd.com> 14 special extensions to add functionality, is a high-performance dual-port 21 const: ceva,ahci-1v84 29 dma-coherent: true 37 power-domains: 40 ceva,p0-cominit-params: [all …]
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/openbmc/linux/Documentation/devicetree/bindings/memory-controllers/ |
H A D | snps,dw-umctl2-ddrc.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/memory-controllers/snps,dw-umctl2-ddrc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Synopsys DesignWare Universal Multi-Protocol Memory Controller 10 - Krzysztof Kozlowski <krzk@kernel.org> 11 - Michal Simek <michal.simek@amd.com> 17 16-bits or 32-bits or 64-bits wide. 19 For instance the ZynqMP DDR controller is based on the DW uMCTL2 v2.40a 20 controller. It has an optional SEC/DEC ECC support in 64- and 32-bits [all …]
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/openbmc/u-boot/arch/arm/dts/ |
H A D | zynqmp.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * dts file for Xilinx ZynqMP 5 * (C) Copyright 2014 - 2015, Xilinx, Inc. 16 compatible = "xlnx,zynqmp"; 17 #address-cells = <2>; 18 #size-cells = <2>; 21 #address-cells = <1>; 22 #size-cells = <0>; 25 compatible = "arm,cortex-a53", "arm,armv8"; 27 enable-method = "psci"; [all …]
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/openbmc/linux/Documentation/devicetree/bindings/mmc/ |
H A D | arasan,sdhci.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Adrian Hunter <adrian.hunter@intel.com> 13 - $ref: mmc-controller.yaml# 14 - if: 18 const: arasan,sdhci-5.1 21 - phys 22 - phy-names 23 - if: [all …]
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/openbmc/linux/Documentation/devicetree/bindings/gpu/ |
H A D | arm,mali-utgard.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/gpu/arm,mali-utgard.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Rob Herring <robh@kernel.org> 11 - Maxime Ripard <mripard@kernel.org> 12 - Heiko Stuebner <heiko@sntech.de> 16 pattern: '^gpu@[a-f0-9]+$' 19 - items: 20 - const: allwinner,sun8i-a23-mali [all …]
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/openbmc/linux/drivers/usb/dwc3/ |
H A D | dwc3-xilinx.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * dwc3-xilinx.c - Xilinx DWC3 controller specific glue driver 15 #include <linux/dma-mapping.h> 22 #include <linux/firmware/xlnx-zynqmp.h> 62 reg = readl(priv_data->regs + XLNX_USB_PHY_RST_EN); in dwc3_xlnx_mask_phy_rst() 69 writel(reg, priv_data->regs + XLNX_USB_PHY_RST_EN); in dwc3_xlnx_mask_phy_rst() 74 struct device *dev = priv_data->dev; in dwc3_xlnx_init_versal() 79 /* Assert and De-assert reset */ in dwc3_xlnx_init_versal() 90 dev_err_probe(dev, ret, "failed to De-assert Reset\n"); in dwc3_xlnx_init_versal() 101 struct device *dev = priv_data->dev; in dwc3_xlnx_init_zynqmp() [all …]
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/openbmc/u-boot/drivers/usb/dwc3/ |
H A D | dwc3-generic.c | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2016 - 2018 Xilinx, Inc. 7 * Based on dwc3-omap.c. 11 #include <asm-generic/io.h> 13 #include <dm/device-internal.h> 15 #include <dwc3-uboot.h> 36 struct dwc3 *dwc3 = &priv->dwc3; in dm_usb_gadget_handle_interrupts() 47 struct dwc3 *dwc3 = &priv->dwc3; in dwc3_generic_peripheral_probe() 49 rc = dwc3_setup_phy(dev, &priv->phys, &priv->num_phys); in dwc3_generic_peripheral_probe() 53 dwc3->regs = map_physmem(priv->base, DWC3_OTG_REGS_END, MAP_NOCACHE); in dwc3_generic_peripheral_probe() [all …]
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/openbmc/linux/drivers/firmware/xilinx/ |
H A D | zynqmp.c | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2014-2022 Xilinx, Inc. 13 #include <linux/arm-smccc.h> 26 #include <linux/firmware/xlnx-zynqmp.h> 27 #include <linux/firmware/xlnx-event-manager.h> 28 #include "zynqmp-debug.h" 35 /* BOOT_PIN_CTRL- Used to control the mode pins after boot */ 37 /* BOOT_PIN_CTRL_MASK- out_val[11:8], out_en[3:0] */ 54 * struct zynqmp_devinfo - Structure for Zynqmp device instance 64 * struct pm_api_feature_data - PM API Feature data [all …]
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/openbmc/linux/ |
H A D | opengrok1.0.log | 1 2024-12-28 20:07:11.902-0600 FINER t583 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/linux',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/linux/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c' 2 2024-12-28 20:07:11.913-0600 FINEST t583 Statistics.logIt: Added: '/openbmc/linux/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c' (CAnalyzer) (took 116 ms) 3 2024-12-28 20:07:11.899-0600 FINER t593 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/linux',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/linux/tools/testing/selftests/powerpc/tm/tm-signa [all...] |
H A D | opengrok0.0.log | 1 2024-12-28 20:09:05.996-0600 FINEST t1171 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/linux/drivers/staging/media/av7110/video-continue.rst.gz' 2 2024-12-28 20:09:05.942-0600 FINEST t1149 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/u-boot/arch/sh/config.mk.gz' 3 2024-12-2 [all...] |
H A D | opengrok2.0.log | 1 2024-12-28 20:05:26.116-0600 FINEST t586 Statistics.logIt: Added: '/openbmc/linux/tools/testing/selftests/drivers/net/mlxsw/rtnetlink.sh' (ShAnalyzer) (took 79 ms) 2 2024-12-28 20:05:26.112-0600 FINER t592 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/qemu',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/qemu/chardev/spice.c' 3 2024-12-28 20:05:26.116-0600 FINEST t592 Statistics.logIt: Added: '/openbmc/qemu/chardev/spice.c' (CAnalyzer) (took 33 ms) 4 2024-1 [all...] |