Home
last modified time | relevance | path

Searched full:vivante (Results 1 – 25 of 35) sorted by relevance

12

/openbmc/linux/Documentation/devicetree/bindings/gpu/
H A Dvivante,gc.yaml4 $id: http://devicetree.org/schemas/gpu/vivante,gc.yaml#
7 title: Vivante GPU
9 description: Vivante GPU core devices
16 const: vivante,gc
66 compatible = "vivante,gc";
/openbmc/linux/drivers/gpu/drm/etnaviv/
H A DKconfig4 tristate "ETNAVIV (DRM support for Vivante GPU IP cores)"
16 DRM driver for Vivante GPUs.
H A Detnaviv_drv.c606 for_each_compatible_node(core_node, NULL, "vivante,gc") { in etnaviv_pdev_probe()
644 * device as the GPU we found. This assumes that all Vivante in etnaviv_pdev_probe()
690 for_each_compatible_node(np, NULL, "vivante,gc") { in etnaviv_init()
H A Detnaviv_gpu.c689 * cannot be read, extracted from vivante kernel driver. in etnaviv_gpu_setup_pulse_eater()
1826 .compatible = "vivante,gc"
/openbmc/linux/Documentation/userspace-api/media/drivers/
H A Ddw100.rst6 The Vivante DW100 Dewarp Processor IP core found on i.MX8MP SoC applies a
69 The Vivante DW100 m2m driver implements the following driver-specific control:
/openbmc/linux/arch/arm/boot/dts/st/
H A Dstm32mp157.dtsi12 compatible = "vivante,gc";
/openbmc/linux/include/uapi/drm/
H A Ddrm_fourcc.h762 /* Vivante framebuffer modifiers */
765 * Vivante 4x4 tiling layout
770 #define DRM_FORMAT_MOD_VIVANTE_TILED fourcc_mod_code(VIVANTE, 1)
773 * Vivante 64x64 super-tiling layout
782 #define DRM_FORMAT_MOD_VIVANTE_SUPER_TILED fourcc_mod_code(VIVANTE, 2)
785 * Vivante 4x4 tiling layout for dual-pipe
791 #define DRM_FORMAT_MOD_VIVANTE_SPLIT_TILED fourcc_mod_code(VIVANTE, 3)
794 * Vivante 64x64 super-tiling layout for dual-pipe
800 #define DRM_FORMAT_MOD_VIVANTE_SPLIT_SUPER_TILED fourcc_mod_code(VIVANTE, 4)
803 * Vivante TS (tile-status) buffer modifiers. They can be combined with all of
[all …]
/openbmc/qemu/include/standard-headers/drm/
H A Ddrm_fourcc.h788 /* Vivante framebuffer modifiers */
791 * Vivante 4x4 tiling layout
796 #define DRM_FORMAT_MOD_VIVANTE_TILED fourcc_mod_code(VIVANTE, 1)
799 * Vivante 64x64 super-tiling layout
808 #define DRM_FORMAT_MOD_VIVANTE_SUPER_TILED fourcc_mod_code(VIVANTE, 2)
811 * Vivante 4x4 tiling layout for dual-pipe
817 #define DRM_FORMAT_MOD_VIVANTE_SPLIT_TILED fourcc_mod_code(VIVANTE, 3)
820 * Vivante 64x64 super-tiling layout for dual-pipe
826 #define DRM_FORMAT_MOD_VIVANTE_SPLIT_SUPER_TILED fourcc_mod_code(VIVANTE, 4)
829 * Vivante TS (tile-status) buffer modifiers. They can be combined with all of
[all …]
/openbmc/openbmc/meta-openembedded/meta-gnome/recipes-graphics/cogl/cogl-1.0/
H A D0001-configure.ac-don-t-require-eglmesaext.h.patch6 E.g. the Vivante EGL implementation does not provide eglmesaext.h.
/openbmc/linux/arch/arm/boot/dts/marvell/
H A Dmmp3.dtsi320 compatible = "vivante,gc";
332 compatible = "vivante,gc";
H A Dmmp2.dtsi44 compatible = "vivante,gc";
H A Ddove.dtsi812 compatible = "vivante,gc";
/openbmc/linux/arch/arc/boot/dts/
H A Dhsdk.dts317 compatible = "vivante,gc";
/openbmc/linux/arch/mips/boot/dts/ingenic/
H A Djz4770.dtsi387 compatible = "vivante,gc";
/openbmc/u-boot/arch/arm/dts/
H A Dimx6q.dtsi198 compatible = "vivante,gc";
H A Dimx6qdl.dtsi211 compatible = "vivante,gc";
222 compatible = "vivante,gc";
H A Dimx6sx.dtsi165 compatible = "vivante,gc";
/openbmc/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6q.dtsi202 compatible = "vivante,gc";
H A Dimx6sl.dtsi989 compatible = "vivante,gc";
999 compatible = "vivante,gc";
H A Dimx6qdl.dtsi215 compatible = "vivante,gc";
227 compatible = "vivante,gc";
/openbmc/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mp.dtsi1949 compatible = "vivante,gc";
1966 compatible = "vivante,gc";
2022 compatible = "vivante,gc";
H A Dimx8mm.dtsi1400 compatible = "vivante,gc";
1416 compatible = "vivante,gc";
H A Dimx8mn.dtsi1260 compatible = "vivante,gc";
/openbmc/linux/Documentation/devicetree/bindings/
H A Dvendor-prefixes.yaml1483 "^vivante,.*":
1484 description: Vivante Corporation
/openbmc/linux/arch/arm/boot/dts/ti/omap/
H A Ddra7.dtsi982 compatible = "vivante,gc";

12